Questions
Using Matlab, Design a Band-Stop Filter (BSF) that removes frequencies from 500Hz to 1000Hz in a...

  1. Using Matlab, Design a Band-Stop Filter (BSF) that removes frequencies from 500Hz to 1000Hz in a signal that is sampled at 10kHz.
  • Compare an elliptic filter of order 12 and 6 to an order-12 Yule-Walker filter design
  • Plot the magnitude of the two designs on the same plot.

In: Electrical Engineering

What are the main objectives of boiler controls? Explain each objective in details

What are the main objectives of boiler controls? Explain each objective in details

In: Electrical Engineering

Design and Test an 8-bit Adder using 4-bit adder. Use 4-bit adder coded in class using...

Design and Test an 8-bit Adder using 4-bit adder. Use
4-bit adder coded in class using full adder that is coded using data flow model. Use test bench
to test 8-bit adder and consider at least five different test vectors to test it.
in behavioral not endmodule

plz help me

In: Electrical Engineering

Theory about the open and short circuit test about the transformer?

Theory about the open and short circuit test about the transformer?

In: Electrical Engineering

Low-Pass RC Filter. Design a low-pass RC filter that will attenuate the amplitude of a 400...

Low-Pass RC Filter.

  1. Design a low-pass RC filter that will attenuate the amplitude of a 400 Hz sinusoidal wave by a factor of two. Draw a schematic diagram for your filter, labeling Vin, Vout, and your specific choices for your R and C values.
  2. At 400 Hz, does the output signal from your filter lead or lag the input signal? By what phase does it lead or lag?
  3. On the same set of axis, sketch Vin and Vout as a function of time for several periods of the wave forms. Assume Vin to be a 400 Hz 10 V peak-to-peak sinusoidal wave. Be sure to label your axes.
  4. If we change our input to a 1 kHz sinusoidal signal, by what factor will the amplitude of the output be suppressed compared with the amplitude of the input? What will the phase difference between the input and output signals be?

In: Electrical Engineering

What are the main internal blocks that a typical FPGA (Field Programmable Gate Arrays) device consists...

What are the main internal blocks that a typical FPGA (Field Programmable Gate Arrays) device consists of? Sketch what a Configuration Logic Block (CLB) internal design looks like and explain each key part of this CLB block? Label the input/output signals and logic blocks appropriately.

In: Electrical Engineering

Introduction, Background of Study and Theory behind Induction type Instruments

Introduction, Background of Study and Theory behind Induction type Instruments

In: Electrical Engineering

Sketch the asymptotes of the Bode plot magnitude and phase for the transfer functions: 1. T(s)...

Sketch the asymptotes of the Bode plot magnitude and phase for the transfer functions:

1. T(s) = 2000/(s(s+200))

2. T(s) = 100/(s(.1s+1)(.5s+1))

3. T(s) = 1/(s(s+1)(.02s+1))

In: Electrical Engineering

Q1. Explain why tolerance is not given for a POT resistor. Q2. List five applications where...

Q1. Explain why tolerance is not given for a POT resistor.


Q2. List five applications where an LDR can be used.

Q3. Discuss what factors could limit the amount of energy stored in a capacitor and explain why capacitors are not useful to store energy for long time.

Q4. Explain why resistance cannot be measured when the resistor is connected to the circuit.

Q5. If you connect a wire between the terminals of a source, the source is then short-circuited. Explain what outcomes you would expect if a voltage source is short-circuited

In: Electrical Engineering

A 3-phase, 20 kVA, 208 V, 4-pole Y-connected synchronous generator has a synchronous reactance of Xs...

  1. A 3-phase, 20 kVA, 208 V, 4-pole Y-connected synchronous generator has a synchronous reactance of Xs = 1.5 W per phase. The resistance of the stator winding is negligible. The machine is connected to a 3-phase 208 V infinite bus. Neglect losses.

  1. The field current and the mechanical input power are adjusted so that the synchronous machine delivers 10 kW at 0.8 lagging power factor. Determine the excitation voltage Ef and the power angle d.
  2. The mechanical input power is kept constant but the field current is adjusted to make the power factor unity. Determine the percent change in the field current with respect to its value in part (a).

In: Electrical Engineering

I, Sketch and describe the structure and principle of operation of a well labeled linear Traveling...

I, Sketch and describe the structure and principle of operation of a well labeled linear Traveling Wave Tube TWT

ii, What are the propagating modes, and Evanescent modes in Waveguide

In: Electrical Engineering

Are down-sampling and up-sampling Linear Time Invariant (LTI) systems? Prove your answers.

Are down-sampling and up-sampling Linear Time Invariant (LTI) systems? Prove your answers.

In: Electrical Engineering

Explain why the voltage increases less rapidly as the DC current increases.

Explain why the voltage increases less rapidly as the DC current increases.

In: Electrical Engineering

using schering bridge to determine power loss in dielectrics

using schering bridge to determine power loss in dielectrics

In: Electrical Engineering

write a verilog code for a 4-bit multiplier by using 4 bit full adder

write a verilog code for a 4-bit multiplier by using 4 bit full adder

In: Electrical Engineering