Given a balanced three-phase delta-connected generator with positive sequence and voltage Vbc=350∠−90∘Vbc=350∠−90∘ Vrms. The generator feeds a balanced three-phase delta-connected load having an impedance of 43.5+j27 Ω/phase. The impedance of the line connecting the generator to the load is 1.5+j1 Ω/phase. i) Calculate the total real power consumed by the load. [5] ii) Calculate the percentage of the total available real power lost in the lines.[3]
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Dynamic logic is considered to be temporary storage compared to static logic; justify the statement. (3
In: Electrical Engineering
typed please..!
Q1 : In a process controlled by PID loop, explain what role each of the below term plays in reference to system’s output, set point and error. In no more than 4-5 lines.
Proportional Gain (P):
Integral Gain (I):
Derivative Gain (D):
In: Electrical Engineering
HI can I please know whats wrong in this 2to1 mux code in VHDL code
also please type it out so theres no confusion thank you
-- Code your design here
library IEEE;
use IEEE.std_logic_1164.all;
-- entity declaration for testbench
entity test mux2 is
end test;
--architecture Body declaration for 2to1 mux
-- component declaration of source entity 2to1 mux
component test mux2 is
port (
sel : in std_logic ; --select input,
A : in std_logic ; --data input
B : in std_logic ;--data input
y : out std_logic ); -- mux output
end component;
--internal Signal declarations
singal sel: std_logic;
singal A,B: std_logic;
singal y: std_logic;
begin
--Instantiate Device under test (out) of 2to1 mux
OUT: test mux2
port map (
sel => sel,
A => A,
B => B,
y => y);
--stimulus process
process
begin
sel <= '0'; A <= '0'; B <= '0';
wait for 10 ns;
sel <= '0'; A <= '0'; B <= '1';
wait for 10 ns;
sel <= '0'; A <= '1'; B <= '0';
wait for 10 ns;
sel <= '0'; A <= '1'; B <= '1';
wait for 10 ns;
sel <= '1'; A <= '0'; B <= '0';
wait for 10 ns;
sel <= '1'; A <= '0'; B <= '1';
wait for 10 ns;
sel <= '1'; A <= '1'; B <= '0';
wait for 10 ns;
sel <= '1'; A <= '1'; B <= '1';
wait;
end process;
DESIGN CODE
library IEEE;
use IEEE.std_logic_1164.all;
-- entity declaration for 2-to-1 mux
entity test mux2 is
port (
sel : in std_logic ; --select input,
A : in std_logic ; --data input
B : in std_logic ;--data input
y : out std_logic); -- mux output
end mux2;
--architecture Body declaration for 2to1 mux
architecture Behavioral of test mux2 is
begin
y <= (((not sel) and A) or (sel and B));
end Behavioral;
In: Electrical Engineering
Q1. The major cause of voltage sag is
A. Malfunction of primary component
B. Equipment Failure
C. Starting of large Induction Machine
D All the above
Q2. What should be the value of sag for proper operation of
overhead transmission line?
A. High
B. Low
C Neither too low nor too high
D. Anything
Q3. The harmonic current distortion in adjustable speed drive is
__________.
A. Constant
B. Not Constant
C High
D. Low
Q4. Reducing the number of short-circuit faults in a system,
reduces
A. Sag
B. Interruptions
C Sag & Interruptions
D. None of the above
Q5. During normal operation, the UPS takes its power from the
supply, rectifies the ac voltage to dc and inverts it again to ac
with the
A. Same frequency and rms value
B. Different frequency and rms value
C Same frequency and different rms value
D. Different frequency and same rms value
In: Electrical Engineering
Question 6) |
a) What is the RMS value of an AC signal? In case of sinusoidal signals which relationship exists |
between RMS and maximum values? [5 marks] |
b) Why AC quantities cannot be added arithmetically as in DC? [5 marks] |
Question 7) |
Given the following A.C. voltage, v(t) = 80 sin (942t – π/6), state: |
(a) angular frequency [3 marks] |
(b) Period [3 marks] |
(c) phase difference [4 marks]
Question 2) |
Using diagrams, state at least three (3) characteristics of lines of magnetic flux
Question 5) |
For the network shown in Figure Q5, the switch is closed on to position 1 when t = 0 and then moved to position 2 when t = 1.5 ms.[10 marks] |
a. Simplify the circuit to simple (conventional) charging and discharging inductor circuit (without so many resistors). [3 marks] b. Determine the current in the inductor when t = 1.5 ms. [3 marks] |
c. Determine the current in the inductor when t = 2.5 ms. [4 marks
In: Electrical Engineering
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Having trouble with the verilog code. Also think my ASM chart may be wrong so some help with that would be great as well thanks. Not sure if the question is linked but its a textbook question. Digital design 6th edition chapter 8 question 10.Link: https://www.chegg.com/homework-help/Digital-Design-6th-edition-chapter-8-problem-10P-solution-9780134529561
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A three-phase synchronous generator is rated 16 kV and 200 MVA, has negligible losses and has reactance of 1.65 pu. The generator is operated on an infinite bus of 15 kV voltage and delivers 100 MVA at 0.8 Power Factor, lagging.
a)Determine the internal voltage (E_i), the power angle (δ), and the line current of the machine.
b)If the field current of the machine is reduced by 10%, while the mechanical power input to the machine is maintained constant, determine the new value of the power angle (δ) and reactive power delivered to the system.
c)The prime mover is next adjusted without changing the excitation so that the machine delivers zero reactive power to the system. Determine the new power angle (δ) and the real power being delivered to the system.
d)What is the maximum reactive power that the machine can deliver if the level of excitation is maintained as in part b?
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I have a question about machine languages. Why do values that are being compare have to be either signed or unsigned? Why cant one value be signed while the other is unsigned in machine language? If you don't understand what I mean by machine language, I am referring to programming language where instructions such as load and store is used. Thank you.
In: Electrical Engineering
Voltage sag is considered the most costly PQ event. Basically,
it affects most of the process facilities in the plant. The EPD SDN
BHD is a plastic plant. The plant is very diligent in monitoring
the power system. They identify the fact that the voltage sag has
occurred over the past 5 years. The total number of voltage sag is
14 events per year and causes damage to the facility. They also
identified the fact that they loss RM 120, 000 ringgit per event
due to this equipment. The plant does post-event cleaning.
a) Explain with suitable justification which equipment has been
used by this plant to measure and record the occurrence of voltage
sag in a year.
b) The management of the plant intends to double the size of the
plant because they cannot keep up with the production. Suggest a
good solution; how this plant could solve the PQ problem and
minimize the loss.
c) The solution for part b) may be expensive, and they cannot
effort any capital for this solution. As a technical advisor how
could you convince the management of the plant such that they can
listen to you?
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What does Shunt resistance mean? What are the differences between serious and shunt?
In: Electrical Engineering
According to the perspective of QPSK digital signal processing, design a block diagram for the given diagram below and explain for the given diagram (how does the signal go through the given diagram).
The following figure is a homodyne detection for coherent optical fiber communications . Once is the signal from laser and the other one is the local oscillator. After the QPSK demodulation, the electric field E will go through the photo diode detection. (you dont have to consider the photodiode in the block diagram design,but if you know how to do that, please do so :) )
The thumbs up will be guaranteed if you state your answer clearly :)
In: Electrical Engineering
-0.85306x ''+ 0.08391a ''- 21.149x '- 0.444a' = V
0.399483x'' – 0.10241a'' - 21.149x'' – 0.444a' + 3.91892a= V
In: Electrical Engineering
Explain what a Long Transmission line is. What can be the result of a lagging and leading load with regards to the Sending end voltage, Sending end Power, efficiency and voltage regulation?
In: Electrical Engineering