Question

Design a four bit down counter with a 7 segment display (hexadecimal digits 0-F)

Part 1: Implement a seven segment display for hexadecimal digits (0-F).

Recommended to first try implementing the seven segment displays for each of the hexadecimal digits using switches as inputs.

Part 2: Implement a four bit down counter.

When this component is complete, add the counter and wire the outputs of the JK flip flops to where the switches were once. The last JK flip flop should be wired to what had originally been the switch representing the most significant bit and the first JK flip flop was wired to what had originally been the switch representing the least significant bit. This is necessary for the counter to count in a downward fashion.

Answer 1

Four bit down counter with a 7 segment display (hexadecimal digits 0-F) will have two blocks:

Block 1: Implementation of the seven-segment display with switches as inputs (for which we will use decoders)

Block 2: Implementation of a four-bit down counter using JK flip flops(as mentioned).

BLOCK 1:

BLOCK 2: FOUR BIT DOWN COUNTER

• The count sequence for the counter will be as shown below:

• Now, the maximum number of states for a 4 bit counter = (which will be evident from the table below)
• No. of flip flops required = No. of bits = 4
• Let's start with the excitation table of a single JK flip flop.

Excitation Table of JK Flip Flop

Qn		J	K
0	0	0
0	1	1
1	0		1
1	1		0

' ' denotes don't care condition

' Qn ' is the present state

' ' is the next state

Hence, for instance, if we want the output to change from 0 to 1, the inputs to the Flip flop will be J=1, K=

• The excitation table for the counter can be given as shown below:

• 

The final block