Design an up/down counter with four states (0, 1, 2, 3) using clocked JK flip flops....

Design an up/down counter with four states (0, 1, 2, 3) using clocked JK flip flops. A control signal x is used as follows: When x = 0 the machine counts forward (up), when x = 1, backward (down). Simulate using MultiSim and attach a simulation printout.

Please address the following:

State Table
State Diagram
Flip Flop Excitation Tables
K-Map Simplification and Resulting Diagram
MultiSim Simulation

Expert Solution

EXCITATION TABLE OF JK FLIP FLOP

Q	Q+	J	K
0	0	0	X
0	1	1	X
1	0	X	1
1	1	X	0

STATE TABLE

PRESENT STATE		INPUT	NEXT STATE		JK FLIP FLOP INPUTs
Q1	Q0	X	Q1+	Q0+	J1	K1	J0	K0
0	0	0	0	1	0	X	1	X
0	0	1	1	1	1	X	1	X
0	1	0	1	0	1	X	X	1
0	1	1	0	0	0	X	X	1
1	0	0	1	1	X	0	1	X
1	0	1	0	1	X	1	1	X
1	1	0	0	0	X	1	X	1
1	1	1	1	0	X	0	X	1

Manojponduru answered 1 year ago

Design a counter using JK Flip Flops and Gates, that counts 3,1,4,2,9,2,2,4 using a Moore Machine....

Design a counter using JK Flip Flops and Gates, that counts 3,1,4,2,9,2,2,4 using a Moore Machine. Show Moore machine state diagram, state table and cirucit.

1. (20pts) Design a 3-bit counter that counts from 0000 to 1111 using JK flip/flops. Do...

1. (20pts) Design a 3-bit counter that counts from 0000 to 1111 using JK flip/flops. Do not forget to include the carry to detect overflow.

Design a 5-bit binary counter using JK flip flops. Draw the flip-flop circuit diagram, the state...

Design a 5-bit binary counter using JK flip flops. Draw the flip-flop circuit diagram, the state graph, the timing diagram, the truth table (with clk pulse) and the state table (with present and next states).

Design a sequential circuit with 2 JK flip-flops A and B, and 2 inputs, E...

Design a sequential circuit with 2 JK flip-flops A and B, and 2 inputs, E and x. the design must adhere to the following requirements: If E = 0, the circuit remains in the same state regardless of the value of x. When E = 1 and x = 1, the circuit goes through the state transitions from 00 to 01 to 10 to 11 back to 00 and repeats. When E = 1 and x = 0, the circuit goes through the...

Design a decoder counter MOD '10' that counts from 0-9 using 4 flip flops and a...

Design a decoder counter MOD '10' that counts from 0-9 using 4 flip flops and a NAND gate.

Design a synchronous counter of four-bit using D flip‐flops and gates (AND, OR etc.) *use verilog...

Design a synchronous counter of four-bit using D flip‐flops and gates (AND, OR etc.) *use verilog language modules and test and explain briefly

Design up counter asyncronous MOD 12 and MOD 14 with JK Flip-Flop

I want to make 5 sec counter from 1000Hz input frequency using D or JK flip-flops....

I want to make 5 sec counter from 1000Hz input frequency using D or JK flip-flops. Anyone can help me with logic circuits and excitation table. Also, 5-bit parallel load register with flipflop.

Design a Count-up Counter in Aiken code with following flip flops: a) D-FF (Active edge is...

Design a Count-up Counter in Aiken code with following flip flops: a) D-FF (Active edge is high to low) b) SR-FF (Active edge is high to low) c) Use of output of circuit in part (b) and minimum number of logic gates for getting the Countdown counter in Aiken code

What is a ripple counter? How is it constructed using D flip-flops?

Question