Question

1. Which of the following is NOT available with a half adder?

1. Sum
2. Carry In
3. Carry Out
4. None of the above

2. For an 8x1 multiplexer, how many control signals/inputs are in need?

1. 1    
2. 2
3. 3
4. 4

3. How many outputs are there for a decoder with 4 inputs (assuming no extra control signals/inputs)?

1. 4
2. 8
3. 12
4. 16

4. After a logic right-shift (by one position), a given sequence 1100 1110 turns into

1. 1100 1110
2. 0110 0111
3. 1110 0111
4. 1001 1100

5. After a logic left-shift (by two positions), a given sequence 1100 1110 turns into

1. 1001 1100
2. 1001 1101
3. 0011 1000
4. 0011 1001

6. After an arithmetic right-shift (by one position), a given sequence 1100 1110 turns into

1. 1100 1110
2. 0110 0111
3. 1110 0111
4. 1001 1100

7. Which of the following shifting operations may cause an overflow?

1. Logic left-shift
2. Logic right-shift
3. Arithmetic left-shift
4. Arithmetic right-shift

Answer 1

1.Which of the following is NOT available with a half adder?

B. Carry In

In half adder carry in property lacks.In half adder there are two inputs A and B and two outputs sum and carry out.Full adder has the property of carry in.

2.For an 8x1 multiplexer, how many control signals/inputs are in need?

C.3

For 8x1 multiplexer there are 3 control signals and 8 input lines.

3.How many outputs are there for a decoder with 4 inputs (assuming no extra control signals/inputs)?

D.16

For decoder output lines are 2^n where,n is input lines.So,for 4 input lines output lines will be 2^4 i.e 16.

4.After a logic right-shift (by one position), a given sequence 1100 1110 turns into?

B.0110 0111

as there is right shift by one positon so 0 will come first and then right shift.

5.After a logic left-shift (by two positions), a given sequence 1100 1110 turns into

D.1001 1100

as there is left shift so each bit will shift left and first bit from left is removed.

6.After an arithmetic right-shift (by one position), a given sequence 1100 1110 turns into

C.1110 0111

Aa in arithmetic right shift each bit moves to the right by one and the least significant bit is discarded and msb is filled with previous.

7.Which of the following shifting operations may cause an overflow?

D.Arithmetic right shift

Note:

I hope my answer met all your requirements.

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