Consider the following inputs and outputs associated with a DCS system. It is interesting to note that EXACTLY the same could be applicable to a SCADA system (although the SCADA system could use either a dedicated RTU or else a PLC).

Break the following signals up (either going to, or away from the RTU-type devices) and indicate which are:

i) digital inputs, ii) digital outputs, iii) analog inputs and iv) analog outputs:

18.1 ( 1 mark) START signal

18.3( 1 mark) An I/P (current to pressure) transducer for a butterfly valve (going to the valve).

18.4( 1 mark) Solenoid Valve (operating something in the field).

18.5( 1 mark) A light.

18.6( 1 mark) An electric motor’s contactor (which will be used to start a motor in the field)

18.7( 1 mark) An RTD temperature probe.

Note – This question is mandatory. It should be answered and students are expected to get this question completely right to be assessed as competent with a score for this module.

List nine general firewall policies?

Describe the purposes within the organization for data collection by the SCADA historian

this is cahce memory related c program....and not working or running properly???????

Explain 6 factors which may be considered in allocating power generation to different power stations for optimum operation

Answer the following:

A. What does BJT means? and why is it called BJT?

B. What are the two types of BJT? Explain their difference and commonalities, as well as their basic operation.

C. What are the three basic configurations of BJT transistor? Explain its input and output characteristics.

1. What do you mean by ‘Intrinsic strength’ of a solid dielectric?

2. What are the drawbacks of single stage circuit for the generation of very high impulse voltage?

3. What is a cascaded transformer?

4. What is the effect of nearby earthed objects on the measurements using sphere gaps?

4. (a) (i) Explain with neat diagram how rod gaps can be used for measurement of high voltages. Compare its performance with a sphere gap.

(ii) Explain with neat diagram the principle of operation of an Electrostatic Voltmeter. Discuss its advantages and limitations for high voltage measurements.

Or

(b) A Rogowski coil is required to measure impulse current of 8 kA having rate of change of current of 1010 A/sec. The voltmeter is connected across the integrating circuit which reads 8 volts for full scale deflection. The input to the integrating circuit is from the Rogowski Coil. Determine the mutual inductance of coil, R and C of the integrating circuit.

2. (a) (i) Explain clearly various processes which explain electric breakdown in vacuum.

(ii) Discuss about the properties of composite dielectrics.

Or

(b) (i) Explain briefly various theories of breakdown in liquid dielectrics.

(ii) Explain the Townsends criterion for a spark.

6. Explain the design philosophy for the selection of various types of busbar arrangements in sub-stations. Which arrangement will you select for a remote rural area sub-station supplying a 10 MVA load through two 33/11 kV transformers? Give complete justification for your answer.

1. What are the advantages of per unit system?

2. What is Jacobian matrix?

3. What is a slack bus?

4. Mention the objectives of short circuit analysis

The objective of this lab is to practice your Verilog coding and the design of a Finite State Machine. Lab Goal: For this lab, you will code a Verilog module to implement the FSM described in this document. This lab will also require that you use the Seven - Segment Display on the DE0 - CV FPGA board. Design Specifications for the FSM Implem ent the following simple state machine on the DE0 - CV FPGA board. This FSM will have 5 states. The clock to this FSM will be provided by yourself using KEY0 (one of the push buttons on the board). Include a debounce module in your code but do not use it. S o you write the code as described in the lecture, but there should be no debounce module instance. I want you to understand this module but it is unnecessary on our board. The transitions from any one state to another are determined by switches 0 through 4 of the board (SW0, SW1, SW2, SW3, and SW4) as shown in the state diagram below. This will be easier than using pushbuttons for the inputs to switch to states. That means you set the switch and then clock it using KEY0. It really only matters what the swi t ch positions are when the clock edge occurs. NOTE reiterating this use slide s witches not pushbuttons for input. Use KEY0 for the clock, and generate the clock signal by hand by pushing KEY0. Any input transition not explicitly referenced in the diagram keeps the machine in the same state. Moreover, if two or more switches are asserted simultaneous ly, no transition should occur. SW0 acts as the rese t and should reset the FSM to S 00 regardless of all other switches or the pushbutton. (note you could use K EY1 pushbutton instead but it isn’t clear that would be better). How to write your code: Study Lecture 9 section 3 on how to write a Finite State Machine in Verilog. Your code will have two parts. There will be a synchronous part which is the part models the flip flops. An example of this is Lecture 9 slide 33. The other part is the combinatorial part, which is the part that feeds the inputs to the flip flops, that is like the code in Lecture 9 slides 29 through 32. This i

a) Sketch the symbols and show the respective equations to represent an adder, multiplier, delay, and memory.

b) Determine the Fourier Transform and Inverse Fourier Transform for an arbitrary periodic and aperiodic signal.