Question

***Verilog**

What are slices and what are they used for ?

What are Offset IN/ Offset Out?

How does JTAG allow the user to debug? 

What's the difference between SPI and BPI?

Answer 1

• What are slices and what are they used for ?

• The slice() function returns a slice object.

  A slice object is used to specify how to slice a sequence. You can specify where to start the slicing, and where to end. You can also specify the step, which allows you to e.g. slice only every other item.

• Syntax:

  • slice(start, end, step)

• Example

  Create a tuple and a slice object. Start the slice object at position 3, and slice to position 5, and return the result:

  a = ("a", "b", "c", "d", "e", "f", "g", "h")
  x = slice(3, 5)
  print(a[x])

• What are Offset IN/ Offset Out?

• Offset in and out constraints are all with respect to the pins of the FPGA.

• Any internal paths (within the FPGA) are computed by the tools. So what you need to tell the tools is the actual available setup and hold time at the FPGA pins for inputs.

• For example, lets say you have a device clocked with the same clock signal provided to the clock input of the FPGA.

• You need to find the minimum and maximum time that the external device can take to change it's outputs after the clock.

• Assuming that the clock arrival time to the external device is the same as the clock arrival at the pin of the FPGA, then the minimum clock to output time will be the available hold time.

• The clock period minus the maximum clock to output time will be the setup time available to the FPGA. Now the constraint is calculated as setup time and valid time rather than setup and hold. Valid time is the sum of available setup and hold times.

• Note that due to board level clock path differences it is possible for one of these to be negative.

• How does JTAG allow the user to debug? I thought it was only to program the FPGA:

• JTAG to debug embedded devices by allowing access to any part of the device that is accessible via the CPU, and still test at full speed.

• This has since become a standard emulation debug method used by silicon vendors. JTAG can also provide system level debug capability.

• Having extra pins on a device provides additional system integration capabilities for benchmarking, profiling, and system level breakpoints.

• What's the difference between SPI and BPI??

• SPI :-

  SPI protocol is serial type interface. It requires less number of programming pins compare to BPI for configuration. The configuration time is more compare to BPI

  • FPGA configures as per industry-standard SPI serial interface protocal.

  • Mostly used in multi-boot applications where multiple bitstreams can be loaded by the FPGA
• BPI:-

BPI protocol is parallel type interface. It requires more number of programming pins compare to SPI for configuration. The configuration time is less compare to SPI

• Uses standard parallel NOR Flash interface
• No clock is needed because the FPGA contains the control logic
• Flash is easily used as addressable memory with address and data buses. Usually used in embedded applications