Type up Verilog Verilog program , test bench and screenshot of the wavefore using verilog xilinx....

Type up Verilog Verilog program , test bench and screenshot of the wavefore using verilog xilinx. (PLEASE ONLY ANSWER IF YOU UNDERSTAND HOW TO USE XILINX.

******************no need to show me the state diagram or state table just the verilog code , test bench and the screenshot of the waveforem ****************

Implement the function given below using each of the following methods. As few 16-1 multiplexers as possible. Behavioral Verilog. F( w , x, y , z) = ?(2 , 4 , 5 , 8 , 11 , 12 , 14 , 15) 1) show code and simulation results

Expert Solution

verilog code

module mux16_to_1(i0,i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15,w,x,y,z, F);

       //select lines w,x,y,z
       //inputs i0 to i15
input w,x,y,z,i0,i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15;
output reg F;
   //behavioral block
   always @ (w or x or y or z or i0 or i1 or i2
                   or i3 or i4 or i5 or i6 or i7 or i8
                    or i9 or i10 or i11 or i12 or i13 or i14 or i15   )

Testbench

module behav_test_bench_v;

   // Inputs
   reg i0;
   reg i1;
   reg i2;
   reg i3;
   reg i4;
   reg i5;
   reg i6;
   reg i7;
   reg i8;
   reg i9;
   reg i10;
   reg i11;
   reg i12;
   reg i13;
   reg i14;
   reg i15;
   reg w;
   reg x;
   reg y;
   reg z;

// Outputs
wire F;

   // Instantiate the Unit Under Test (UUT)
   mux16_to_1 uut (
       .i0(i0),
       .i1(i1),
       .i2(i2),
       .i3(i3),
       .i4(i4),
       .i5(i5),
       .i6(i6),
       .i7(i7),
       .i8(i8),
       .i9(i9),
       .i10(i10),
       .i11(i11),
       .i12(i12),
       .i13(i13),
       .i14(i14),
       .i15(i15),
       .w(w),
       .x(x),
       .y(y),
       .z(z),
       .F(F)
   );

   initial begin
       // Initialize Inputs
       i0 = 0;
       i1 = 0;
       i2 = 1;
       i3 = 0;
       i4 = 1;
       i5 = 1;
       i6 = 0;
       i7 = 0;
       i8 = 1;
       i9 = 0;
       i10 = 0;
       i11 = 1;
       i12 = 1;
       i13 = 0;
       i14 = 1;
       i15 = 1;
       w = 0;
       x = 0;
       y = 0;
       z = 0;

       // Wait 100 ns for global reset to finish
       #100;

       // Add stimulus here

end

initial begin

# 5 w=0; x=0; y=0; z=1; //0000 combination for wxyz
# 5 w=0; x=0; y=1; z=0; //0001 combination
# 5 w=0; x=0; y=1; z=1;
# 5 w=0; x=1; y=0; z=0;
# 5 w=0; x=1; y=0; z=1;
# 5 w=0; x=1; y=1; z=0;
# 5 w=0; x=1; y=1; z=1;
# 5 w=1; x=0; y=0; z=0;
# 5 w=1; x=0; y=0; z=1;
# 5 w=1; x=0; y=1; z=0;
# 5 w=1; x=0; y=1; z=1;
# 5 w=1; x=1; y=0; z=0;
# 5 w=1; x=1; y=0; z=1;
# 5 w=1; x=1; y=1; z=0;
# 5 w=1; x=1; y=1; z=1;

end

endmodule

waveforms

Manojponduru answered 2 years ago

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