Question

In: Computer Science

Describe how zero, infinity, and NaN are stored in IEEE 754 floating point formats

Describe how zero, infinity, and NaN are stored in IEEE 754 floating point formats

Solutions

Expert Solution

IEEE 754 standards:

· This is a technical standard for floating point operations.

· Established in the year 1985

· By, IEEE, the Institute of Electrical and Electronics Engineers

· IEEE has reserved some values for solving the uncertainty issues.

· They are ZERO, INFINITY, NaN

According to IEEE 754, the floating points numbers are represented using 3 components:

1. Sign of mantissa

           This is to denote whether the floating point number is a positive or a negative number.

0 represent positive numbers, while 1 represent a negative number.

2. Exponent field:

This field is to represent the negative and positive exponents of the floating point number.

3. Mantissa:

This field has all the significant digits of the floating point number represented.

Also these fields are only filled with binary values, 0 and 1.

----------------------------------------------------------------------------------------------------------------------------------------------------------

ZERO:

· Here the exponent and mantissa are filled with value 0

· According to this standard, +0 and -0 are distinct, even if they have equal value.

· The sign bit varies for the + and – infinity.

The bit representation of zero can be like:

+0.0 = 0 00000000 00000000000000000000000

-0.0 = 1 00000000 00000000000000000000000

INFINITY:

· Here exponents are all 1’s

· Mantissa all 0’s

· The +infinity and – infinity are represented distinctively

· The sign bit value helps to identify whether it’s positive or a negative infinity.

The bit representation of two kinds of infinity are:

+Infinity= 0 11111111 00000000000000000000000

- Infinity = 1 11111111  00000000000000000000000

  

NaN:

· Not-A-Number

· This is to represent an error number value.

· NaN, can be the results of operations like 0/0, infinity/infinity, infinity-infinity, or infinity*0.

· Here exponent fields are all 1, with 0 sign bit

· mantissa with 1 followed by all zeros

· there are different kinds of NaN like, Quiet NaN or qNaN

· and also Signalling NaN or sNaN

. the bit representation of common NaN is like:

Nan= 0  11111111 10000000000000000000000

·

·


Related Solutions

Represent the following decimal numbers using IEEE-754 floating point representation. A. -0.375 B. -Infinity C. 17...
Represent the following decimal numbers using IEEE-754 floating point representation. A. -0.375 B. -Infinity C. 17 D. 5.25
IEEE 754 format of 32-bit floating-point is as follows. 1 8 (bits) 23 (bits) What’s stored...
IEEE 754 format of 32-bit floating-point is as follows. 1 8 (bits) 23 (bits) What’s stored in each region? What’s the bias value and how to get it? For decimal fraction: – 0.625, please represent it as given format (Note: you must show the specific procedure/stepsin order to get full credits. If you only present final result directly, you will only get half of the credits even if it is correct.).  
verilog code to implement 32 bit Floating Point Adder in Verilog using IEEE 754 floating point...
verilog code to implement 32 bit Floating Point Adder in Verilog using IEEE 754 floating point representation.
In this question, you are provided with an IEEE-754 floating-point number in the form of 8...
In this question, you are provided with an IEEE-754 floating-point number in the form of 8 hexadecimal digits. You are asked to decode this value into its decimal representation. You MUST report your answer as a real number. Do NOT use scientific notation. Do NOT round or truncate your answer. Do NOT add any spaces or commas to your answer. If the converted number is positive, do NOT add the plus sign. Convert, i.e., decode, 0x48801002 from the 32-bit single-precision...
a newer version of IEEE 754 defines a half precision floating point format that is only...
a newer version of IEEE 754 defines a half precision floating point format that is only 16 bits wide. the left most bit is still the sign bit. the exponent is 5 bits wide and has a bias of 15, and the fraction is 10 bits long. A hidden 1 is assumed similar to single and double precision formats. what is the bit pattern to represent -0.5 using this format?
Convert 1101.11011101 x 223 to IEEE Standard 754 for single-precision floating-point binary format. Convert the IEEE...
Convert 1101.11011101 x 223 to IEEE Standard 754 for single-precision floating-point binary format. Convert the IEEE Standard 754 number 11001010100011010101000000000000 to its decimal equivalent.
For IEEE 754 single-precision floating point, what is the hexadecimal representation of 27.101562? A. 35CCD001 B....
For IEEE 754 single-precision floating point, what is the hexadecimal representation of 27.101562? A. 35CCD001 B. 2F5C10D0 C. 41D8D000 D. 7DCA1111 E. None of the above
Using IEEE 754 single precision floating point, write the hexadecimal representation for each of the following:...
Using IEEE 754 single precision floating point, write the hexadecimal representation for each of the following: a. Zero b. -2.0 (base 10) c. 256. 0078125 (base 10) d. Negative infinity
I need a synthesizable Verilog code/module implementing the IEEE 754 Floating Point multiplication and a corresponding...
I need a synthesizable Verilog code/module implementing the IEEE 754 Floating Point multiplication and a corresponding test bench. It should set a flag for underflow and overflow conditions if they arise during the multiplication for the output. It would be greatly appreciated if someone could write this floating point multiplication code in Verilog with some comment lines so i could understand the functioning too with a test bench module ! I have tried to explain everything as clearly as possible...
Convert 1.67e14 to the 32-bit IEEE 754 Floating Point Standard, with the following layout: first bit...
Convert 1.67e14 to the 32-bit IEEE 754 Floating Point Standard, with the following layout: first bit is sign bit, next 8 bits is exponent field, and remaining 23 bits is mantissa field; result is to be in hexadecimal and not to be rounded up. answer choices 5717E27B 57172EB7 5717E2B7 C717E2B7 5771E2B7
ADVERTISEMENT
ADVERTISEMENT
ADVERTISEMENT