In: Electrical Engineering
write the code for 16-bit ALU using vivado.
Approach : A hierarchical design approach for 16-bit ALU using a Full Adders (16-bit), Multiplier (16-bit), Full Subtractor (16-bit), and shift left A register. include test bench.
S0 S1 Alu-operation
0 0 addition
0 1 subtraction
1 0 multiplication
1 1 shift right
//Top file
module alu(
input [15:0] A, B,
input S1, S0,
input cin, //cin for adder or borrow in for subtractor
output reg cout, //cout for adder or borrow out for subtractor
output reg [15:0] alu_out
);
wire [15:0] add16, sub16, shift;
reg [15:0] result;
wire carry, borrow;
wire [31:0] mult;
adder16 uut0 (A, B, cin, add16, carry);
subtractor16 uut1 (A, B, cin, sub16, borrow);
multiplier16 uut2 (A, B, mult);
shiftA uut3 (A, shift);
always @ (S1, S0, add16, sub16, mult, shift)
begin
case ({S1, S0})
2'b00: begin alu_out <= add16; cout <= carry; end
2'b01: begin alu_out <= sub16; cout <= borrow; end
2'b10: alu_out <= mult[15:0];
2'b11: alu_out <= shift;
default : alu_out <= 4'h0000;
endcase
end
endmodule
//adder 16 bit
module adder16 (A, B, cin, SUM, Cout);
input [15:0] A, B;
input cin;
output [15:0] SUM;
output Cout;
assign {Cout, SUM} = cin + A + B;
endmodule
//
module subtractor16 (A, B, bin, difference, bout);
input [15:0] A, B;
input bin;
output [15:0] difference;
output bout;
assign {bout, difference} = A - B - bin;
endmodule
//multiplier
module multiplier16 (A, B, PRODUCT);
input [15:0] A, B;
output [31:0] PRODUCT;
assign PRODUCT = A * B;
endmodule
//Shift
module shiftA (A, RESULT);
input [15:0] A;
output [15:0] RESULT;
assign RESULT = A >> 1;
endmodule
//testbench
module tb_alu;
// Inputs
reg [15:0] A;
reg [15:0] B;
reg S1;
reg S0;
reg cin;
// Outputs
wire cout;
wire [15:0] alu_out;
// Instantiate the Unit Under Test (UUT)
alu uut (
.A(A),
.B(B),
.S1(S1),
.S0(S0),
.cin(cin),
.cout(cout),
.alu_out(alu_out)
);
initial begin
// Initialize Inputs
A = 0;
B = 0;
S1 = 0;
S0 = 0;
cin = 0;
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
A = 16'b0000000000001000; //8
B = 16'b0000000000000100; //4
S1 = 1'b0;
S0 = 1'b0;
#20;
S1 = 1'b0;
S0 = 1'b1;
#20;
S1 = 1'b1;
S0 = 1'b0;
#20;
S1 = 1'b1;
S0 = 1'b1;
#50 $finish;
end
endmodule
//Simulation