1. Design a combinational circuit that coverts a 4-bit Gray
code to a 4-bit Excess-3
code. Provide detailed solution and explanation.
2. Design a double edge-triggered D flip-flop using
multiplexers only. The output of the flip-flop Q should “sample”
the value of the input D on both rising (+ve) and falling (-ve)
edges of the clock CLK. Provide detailed solution and
explanation.
3. Design an FSM counter that counts the sequence: 00, 11, 01,
10, 00, 11, ... . Provide...