Design a circuit and write a verilog code description of the 16-bit right rotator using barrel...

Design a circuit and write a verilog code description of the 16-bit right rotator using barrel shift method

Expert Solution

VERILOG CODE:

module multiplexer_16_4(X, A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11, A12, A13, A14, A15, S3, S2, S1, S0);
   parameter WIDTH=16;     // How many bits wide are the lines

   output [WIDTH-1:0] X;   // The output line

   input [WIDTH-1:0]  A15;  // Input line with id 4'b1111
   input [WIDTH-1:0]  A14;  // Input line with id 4'b1110
   input [WIDTH-1:0]  A13;  // Input line with id 4'b1101
   input [WIDTH-1:0]  A12;  // Input line with id 4'b1100
   input [WIDTH-1:0]  A11;  // Input line with id 4'b1011
   input [WIDTH-1:0]  A10;  // Input line with id 4'b1010
   input [WIDTH-1:0]  A9;   // Input line with id 4'b1001
   input [WIDTH-1:0]  A8;   // Input line with id 4'b1000
   input [WIDTH-1:0]  A7;   // Input line with id 4'b0111
   input [WIDTH-1:0]  A6;   // Input line with id 4'b0110
   input [WIDTH-1:0]  A5;   // Input line with id 4'b0101
   input [WIDTH-1:0]  A4;   // Input line with id 4'b0100
   input [WIDTH-1:0]  A3;   // Input line with id 4'b0011
   input [WIDTH-1:0]  A2;   // Input line with id 4'b0010
   input [WIDTH-1:0]  A1;   // Input line with id 4'b0001
   input [WIDTH-1:0]  A0;   // Input line with id 4'b0000
   input              S3;   // Most significant selection bit
   input              S2;   
   input              S1;   
   input              S0;   // Least significant selection bit
   
   assign X = (S3 == 0 
               ? (S2 == 0 
                  ? (S1 == 0 
                     ? (S0 == 0 
                        ? A0       // {S3,S2,S1,S0} = 4'b0000
                        : A1)      // {S3,S2,S1,S0} = 4'b0001
                     : (S0 == 0 
                        ? A2       // {S3,S2,S1,S0} = 4'b0010
                        : A3))     // {S3,S2,S1,S0} = 4'b0011
                  : (S1 == 0 
                     ? (S0 == 0 
                        ? A4       // {S3,S2,S1,S0} = 4'b0100
                        : A5)      // {S3,S2,S1,S0} = 4'b0101
                     : (S0 == 0 
                        ? A6       // {S3,S2,S1,S0} = 4'b0110
                        : A7)))    // {S3,S2,S1,S0} = 4'b0111
               : (S2 == 0 
                  ? (S1 == 0 
                     ? (S0 == 0 
                        ? A8       // {S3,S2,S1,S0} = 4'b1000
                        : A9)      // {S3,S2,S1,S0} = 4'b1001
                     : (S0 == 0 
                        ? A10      // {S3,S2,S1,S0} = 4'b1010
                        : A11))    // {S3,S2,S1,S0} = 4'b1011
                  : (S1 == 0 
                     ? (S0 == 0 
                        ? A12      // {S3,S2,S1,S0} = 4'b1100
                        : A13)     // {S3,S2,S1,S0} = 4'b1101
                     : (S0 == 0 
                        ? A14      // {S3,S2,S1,S0} = 4'b1110
                        : A15)))); // {S3,S2,S1,S0} = 4'b1111
endmodule

The 16-bit barrel shifter generated the following waveform:

Manojponduru answered 1 year ago

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