Design a 5 bit binary counter on logicly?

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Expert Solution

We can use an asynchronous counter. So we will use 5 JK flip flops with both J and K given logic HIGH. And the flip flop representing Q0, the LSB is given the clock. Now the output from the flip flop Q0 is given as the clock to the flip flop representing Q1 and the output from Q1 is given as the clock to the flip flop representing Q2 and so on.

Initially all flip flops are in the LOW state. So the output is 00000, which is decimal 0.

Now when the first clock pulse comes to the flip flop representing Q0, it turns to 1 as the J and K are HIGH and so it will toggle its output. Now other flip flops will be in the low state as they have not received the clock. So the output will be 00001, which is decimal 1.

When the next clock pulse comes, the flip flop representing Q0 again toggles and becomes LOW. Also the flip flop representing Q1 becomes HIGH as now it gets the clock. This will result in 00010, which is 2.

This will continue and we get a 5 bit UP counter

The circuit diagram is shown below

The truth table is shown below

The circuit is simulated in NI MULTISIM and found working

Manojponduru answered 3 weeks ago

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