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In: Electrical Engineering

Make a schema for a memory size of 65536 words per 8 bits. Use 8k  by 8-bit...

Make a schema for a memory size of 65536 words per 8 bits. Use 8k  by 8-bit 2764 memory a) with a single decoder 388 and inverters. b) Use a decoder 2 4 and inverters? Help?   How to implement?

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Expert Solution

Schematic for 64Kx8 memory using 8Kx8 chips and 3x8 decoder

Schematic diagram of 64Kx8 memory using 8Kx8 chips , two 2x4 decoders and one inverter

I used the same principle in both designs a , b

I.e basically address decoding using available decoders in both cases using ( A15-A13) address lines as input to decoder and using the decoder outputs to drive chip select of respective memory chip (8Kx8)

As u know in decoder once only one outout will be high so at a particular input address only one memory chip will be active to load or store data in specified memory location


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