Create a state meachine that encrypts an incoming digital bitstream using a D-flip-flop and a Mealy...

Create a state meachine that encrypts an incoming digital bitstream using a D-flip-flop and a Mealy Meachine. The device have to meet these requirments:

A. The output of the encryption device matches the input bitstream until a certain set of bits is detected (such as 110). After this detection, the output is the complemented version of the input.

B. When a second bitstream 010 is detected, the output reverts to simply matching the input stream again. Please make both bitstreams that cause the switching action to be at least 3 bits in length.

Please include the following for the above questions:

1. A state graph for the machine.

2. The state tables, truth tables, and K-maps that you used to design the machine.

3. Give the example bitstream output demonstrating the machine in operation. Example bitstream: 0111010001110101

Expert Solution

PRESENT STATE			INPUT	NEXT STATE			OUTPUT
Q2	Q1	Q0	X	Q2+	Q1+	Q0+	Z
0	0	0	0	0	0	0	0
0	0	0	1	0	0	1	0
0	0	1	0	0	0	0	0
0	0	1	1	0	1	0	0
0	1	0	0	0	1	1	1
0	1	0	1	0	1	0	0
0	1	1	0	1	0	0	1
0	1	1	1	0	1	1	0
1	0	0	0	1	0	0	1
1	0	0	1	1	0	1	0
1	0	1	0	0	0	0	1
1	0	1	1	0	1	1	0
1	1	0	0	X	X	X	X
1	1	0	1	X	X	X	X
1	1	1	0	X	X	X	X
1	1	1	1	X	X	X	X

D Flip Flop output is delayed version of its input. Hence D Flop inputs can be same as Q2+, Q1+ and Q0+ outputs.

Karnaugh Mapping used to derive expressions for D2, D1 and D0 inputs of D Flip Flops.

Design is simulated in logisim. Output observed for the input pattern "0111010001110101" is "0000101110001000" as per design spec

Manojponduru answered 1 year ago

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