In: Electrical Engineering
Use the 74LS138 , to design an address decoder that will place 8K by 16bit RAM at a starting address of C000h and 8K RAM at a starting address of 6000h.
A total of 13 bits is required to address any memory location in a 8K memory as 213 = 8192 or 8K locations.
Hence starting address of a 8K memory will be 13 times 0 i.e. 0000000000000 and
End Address of a 8K memory will be 13 times 1 i.e. 1111111111111
The Address bus width given in the question is in hex form and its size is 4 digits which is equivalent to 16 bits.
For 8K memory, 13 (A0 - A12) bits are used and hence MSB 3 bits (A13-A15) remaining is used for absolute addressing.
Memory |
A15 |
A14 |
A13 |
A12 |
A11 |
A10 |
A9 |
A8 |
A7 |
A6 |
A5 |
A4 |
A3 |
A2 |
A1 |
A0 |
Address |
RAM1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Starting Address C000h |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
End Address DFFFh |
|
RAM2 |
0 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Starting Address 6000h |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
End Address 7FFFh |
74LS138 is a 3:8 decoder. Hence A13, A14 and A15 is input to the decoder as shown below:
For RAM1 , A15A14A13 = 110 Hence Y6 of decoder is connected to chip Select line.
For RAM2, A15A14A13 = 011 Hence Y3 of decoder is connected to chip Select line.