Question

MOS capacitor with different metal and semiconductor work functions.

At room temperature, using the p+ poly-Si work function ?_p+Si = 5.2 eV, electron affinities X_SiO2 = 0.95 eV, X_Si = 4.05 eV and bandgaps E_G,_SiO2 = 9 eV, E_G,Si = 1.1 eV.

For MOS capacitor composed of a p+ poly-Si gate and 1?-cm p-type Si:

Sketch accurately, the energy band diagram throughout the MOS capacitor under flatband conditions indicating the band offsets and the energy differences from the vacuum level

What is the gate bias needed to achieve flat band conditions?

Sketch accurately the energy band diagram at equilibrium indicating clearly the potential drop values across the oxide and the semiconductor

Repeat part a for n-type Si @ 1?-cm

**From Table in tetbook, Doping levels for 1 ohm-cm (P-type) ~ Na = 0.5e16 and 1 ohm-cm (n-type) ~ Nd = 5e15**

Answer 1

• MOS capacitor is an equilibrium device i.e. when the external voltage is not applied to the device the Fermi level of metal and semiconductor are at same level.
• When external voltage is applied to device it behaves according to the voltage applied with respect to flat band voltage and threshold voltage.
• Flat band voltage is defined as a work function difference between the gate metal and the semiconductor when no charge is present in oxide-semiconductor interface.
• Threshold voltage is defined as the minimum gate-to-source voltage required to induce or create a conducting channel. This can be divided into three types

Figure shows flat band diagram