Edit question Write a program that merges two files as follows. The two files are in the docsharing which you can download it. One file will contain usernames(usernames.txt):foster001smith023nyuyen002...The other file will contain passwords(passwords.txt):x34rdf3ep43e4rddw32eds22...The program should create a third file matching username and passwords(usernamesPasswords.txt):foster001x34rdf3esmith023p43e4rddnyuyen002w32eds22......Give the user of your programs the option of displaying you output file. CAN ANYONE SOLVE THIS IN C

write a verilog code to implement a digital system that has an odd counter that counts from 1 to 11. Also, this system has an output Y that detects a specific number in the odd counter. Test your code when you detect the number 3, the output Y is 1, if the counter value is set to 3, otherwise 0.

Explain the operation of 12-pulse full controlled rectifier by sketching circuit schema and related waveforms and by giving the fundamental equations. What are the advantages of that circuit?

VHDL Code will not run simulation. What is the problem with my code??

--VHDL Code

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.NUMERIC_STD.ALL;

entity DataMemory16Bits is
Port ( Address_DM : in STD_LOGIC_VECTOR(15 downto 0);
Data_In_DM : in STD_LOGIC_VECTOR(15 downto 0);
Clock : in STD_LOGIC;
We_DM : in STD_LOGIC;
Re_DM : in STD_LOGIC;
Data_Out_DM : out STD_LOGIC_VECTOR(15 downto 0));
end DataMemory16Bits;

architecture Behavioral of DataMemory16Bits is
Type DataMemory16Bits is array(0 to 31) of STD_LOGIC_VECTOR(15 downto 0);
signal memory: DataMemory16Bits;

begin
process (Address_DM, Clock, We_DM, Re_DM)
begin
Data_Out_DM <= (Others=>'Z');
if (Clock='1')
then
if We_DM='1' and Re_DM='0'
then
Memory(to_integer(unsigned(Address_DM))<= Data_In_DM;
end if;
if Re_DM='1' and We_DM='0'
then
Memory(to_integer(unsigned(Data_In_DM)<= Address_DM;
end if;
if Re_DM='1' and We_DM='1'
then
Data_Out_DM<=Memory(to_integer(unsigned(Address_DM);
else
Data_Out_DM<=(Others=>'Z');
end if;
end if;
end process;
end Behavioral;

We want to make a machine that detects an alternating pattern. It should indicate whether

three or more alternating bits have been observed on our serial input X. So, if X has 010 or

101, the output Z will be high, otherwise the output will be low. Assume that when the

machine starts up or is reset, is has not seen any bits of data to work with and the output

cannot go high until it sees the third bit of data.

Your task is to design two CONCEPTUALLY different synchronous state machines (Mealy

and Moore) in Logisim. You can use either J-K or D flip-flops.

Your Task:

Make the State Diagram

Make the State Assignments

Make the State Transition Table

Make the K-Maps

Derive the Equations

Implement in Logisim

Write a Behavioral model VHDL code that implements an ALU that can perform addition, subtraction, multiplication, shift right, shift left, logical NAND, and logical NOR. Write a VHDL test bench to test the ALU with at least one test vector per operation.

A company plans to purchase a transformer that will be used 12 hours at full load and 12 hours with no load but still connected to the power supply at all times. The transformer has copper losses of 5 kW and core losses of 3.5 kW. Electricity costs $0.07/kW-hr. What is the total cost of transformer losses over a period of 1 year?

A company plans to purchase a transformer that will be used 12 hours at full load and 12 hours with no load but still connected to the power supply at all times. The transformer has copper losses of 5 kW and core losses of 3.5 kW. Electricity costs $0.07/kW-hr. What is the total cost of transformer losses over a period of 1 year?

why differentrial signalling is better then common?

why differential signal cancels inductance?

thanks

An inductor in a switch-mode power supply that operates at a peak current of 8 A needs to store 80 mJ of energy, thereafter release it to a 10 ? load resistor. Suppose this inductor had to be custom designed and built as a solenoid coil wound on a pencil (10 mm diameter) with no magnetic properties. Only one layer of turns is allowed on the pencil’s outer surface, and 0.1-mm diameter enamel coated wire has to be used. Answer the following carefully:

(a) Calculate the required inductance to store the energy.

(b) Draw an isometric sketch of the air-core inductor with only one layer of turns, showing its dimensions and a few turns of wire. Also draw some flux lines.

(c) Calculate the effective cross-sectional flux area of the air-core inductor.

(d) Do 3 iterative calculations to solve the number of turns (tightly wound next to each other) required to achieve the inductance in (a). Comment on your result after each iteration.

Define the following terms related to D/A converter;                                  

            (i) resolution   (ii) accuracy    (iii) settling time         (iv) offset error      (v) gain error

What is the high voltage and insulation tests for transformers ? How we can generate full-wave ,chopped-wave and switching wave voltages in Marx generator for (Lightning and switching impulse tests )?

Butterworth filter

a)Design a 5th order low pass Butterworth low-pass filter with a cut-off frequency of 1592 Hz and a dc gain of 3dB. Find and present the mathematical transfer function of the filter, showing all your steps.

b) Write a Matlab code to plot the magnitude of this function with a linear scale in dB units on the ordinate, and a log scale of frequency on the abscissa.
The plot range should be: ordinate- linear scale from -100dB to +10dB; abscissa- log scale from 1000 rads/sec to 100,000 radians/sec.

For a company that is obliged to employ an electrical and electronic engineer, I would like you to make a risk assessment and include the following topics.

STEP 1: Detect hazards

STEP 2: Identify Risks

STEP 3: Decide on control measures

STEP 4: Complete control measures

STEP 5: Watch and repeat