Design an up/down counter with four states (0, 1, 2, 3) using
clocked JK flip flops. A control signal x is used as follows: When
x = 0 the machine counts forward (up), when x = 1, backward (down).
Simulate using MultiSim and attach a simulation printout.
Please address the following:
State Table
State Diagram
Flip Flop Excitation Tables
K-Map Simplification and Resulting Diagram
MultiSim Simulation
Design a 5-bit binary counter using JK flip flops.
Draw the flip-flop circuit diagram, the state graph, the timing
diagram, the truth table (with clk pulse) and the state table (with
present and next states).
Question 3:
A)Design a BCD counter.
-The circuit counts from 0 to 9, then resets back to 0 to
restart the counting sequence.
-The circuit has one input run/stop. If the input is 1, the
eounter will count. If the input is 0, the counter will freeze in
its current location until the input is set to 1 again.
-The circuit has one output. It becomes 1 when the counter
completes a cycle and starts the next one. Otherwise, that...
(a) Design a 4-bit ring counter. Use an external asynchronous
INIT input to initialize the flip-flops to a valid initial state.
Also remember to hook up the CLOCK to all flip-flops.
(b) Design a 4-bit Johnson counter. Use an external asynchronous
INIT input to initialize the flip-flops to a valid initial state.
Also remember to hook up the CLOCK to all flip-flops.
(c) How many states does the ring counter in part (a) have? How
many states does the Johnson...
Design a synchronous counter, using T flip-flops, that has the
following sequence: 0010, 0110, 1000, 1001, 1100, 1101, and repeat.
From the undesired states the counter must always go to 0010 on the
next clock pulse.