I want to make 5 sec counter from 1000Hz input frequency using D
or JK flip-flops. Anyone can help me with logic circuits and
excitation table. Also, 5-bit parallel load register with
flipflop.
Design a counter that uses only 3 D flip-flops and as many logic
gates as needed. The counter follows a sequence: 0, 5, 25, 15, 9,
6, 12, 3, 0, 5, 25, 15, 9, 6, 12, 3, …. Show all design details,
i.e., block diagram, equations, and circuit diagram.
Design a counter using JK Flip Flops and Gates, that counts
3,1,4,2,9,2,2,4 using a Moore Machine. Show Moore machine state
diagram, state table and cirucit.
Design a Count-up Counter in Aiken code with following flip
flops: a) D-FF (Active edge is high to low) b) SR-FF (Active edge
is high to low) c) Use of output of circuit in part (b) and minimum
number of logic gates for getting the Countdown counter in Aiken
code
Design a 5-bit binary counter using JK flip flops.
Draw the flip-flop circuit diagram, the state graph, the timing
diagram, the truth table (with clk pulse) and the state table (with
present and next states).
Using Multisim, connect the circuit and verify the
characteristic tables for the following flip flops: D, T and JK
Add 4 screen shots which verify the characteristic table
2 for D, T, and JK FF.
2 more for remaining input combinations of JK