Question

1. When is an external interrupt recognized by the CPU?  When more than one interrupt occurs, what approaches would you use to service them? What approaches should be taken when an interrupt occurs within an interrupt service routine

3. Consider a hypothetical microprocessor having 64-bit instructions composed of two fields: the first 16-bits contains the op-code and the remainder the immediate operand or an operand address.  Assume memory is organized in 32-bit words, i.e. one r/w access can yield a maximum of 32 bits.  
   
   1. What is the maximum directly addressable memory capacity (in bytes)?
   2. How many bits are needed for the program counter and the instruction register?
   3. Discuss the impact on the system speed if the microprocessor has:

            (i) a 64-bit local address bus and a 16-bit local data bus, or

             (ii) a 32-bit local address bus and a 64-bit local data bus.

4. Consider a hypothetical microprocessor generating a 32-bit address (assume that the program counter and the address registers are 32-bit wide) and having a 32-bit data bus. Assume memory is byte addressable.
   1. What is the maximum memory address space that the processor can access directly if connected to a “32-bit memory”?
   2. What is the maximum memory address space that the processor can access directly if connected to an “16-bit memory”?
   3. What architectural features will allow this microprocessor to access a separate “I/O space”?
   4. If an input and an output instruction can specify a 16-bit I/O port number, how many 16-bit I/O ports can the microprocessor support? How many 32-bit I/O ports?

5-) Consider a microprocessor, with a 64-bit external data bus, driven by a 1 GHzinput clock. Assume this microprocessor has a bus cycle whose minimum duration equals five (5) input clock cycles. What is the maximum data transfer rate that this microprocessor can sustain? To increase its performance, would it be better to make its external data bus 128-bitsor to double the external clock frequency supplied to the microprocessor? Discuss and state any other assumptions you make, and explain.  Hint: Determine the number of bytes that can be transferred per bus cycle.

Answer 1