Question

What is Translatinal look-aside buffer (TLB)? What is it for? What is stored in this memory? How can yo distinguish TLB buffer from cache memory?

Answer 1

A translation lookaside buffer (TLB) is a memory cache that stores recent translations of virtual memory to physical addresses for faster retrieval. When a virtual memory address is referenced by a program, the search starts in the CPU. First, instruction caches are checked. If the required memory is not in these very fast caches, the system has to look up the memory’s physical address. At this point, TLB is checked for a quick reference to the location in physical memory.

It is used to reduce the time taken to access a user memory location. Most processors include TLBs to increase the speed of virtual memory operations through the inherent latency-reducing proximity as well as the high-running frequencies of current CPU’s.

TLB keeps the mapping of virtual-physical addresses in a fast memory, access to improves page-table.

Cache is to buffer memory accesses - actual reads and writes to memory. TLB buffer is to buffer mappings from virtual addresses in the address space of the process to physical addresses in memory - the service operations accompanying memory accesses.

TLB is about ‘speeding up address translation for Virtual memory’ so that page-table needn’t to be accessed for every address. CPU Cache is about ‘speeding up main memory access latency’ so that RAM isn’t accessed always by CPU. TLB operation comes at the time of address translation by MMU while CPU cache operation comes at the time of memory access by CPU.