Question

1. Translation look-aside buffers (TLBs): what are they? What problem are they trying to solve? Why must a TLB be flushed on every context switch? What hardware support is necessary to avoid TLB flushing upon every context switch?

Answer 1

Page table tells which page is placed in which frame in currently in main memory. Because of paging average memory access time is two times (one for page table another for getting final address which is stored in main memory) the main memory time for every action which makes the system slow. If a process executes in a sequential pattern and a page is accessed a various number of times which is not suitable to access it through via page table every single time. To solve this problem, specialised hardware called TLB is used, to avoid transition between frames which contains the page number and frames (translations between virtual memory to physical memory) and act as virtual catch. Whenever we access a page repeatedly (the first time would be a problem as we have to find it using page table, but for future, it works fine), we have saved it in a local buffer. TLB is hardware and low entry size (e.g. 128), so access time would be very less. TLB must be flushed on every context switch to avoid accesses from the next process into the current process's memory.