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In: Computer Science

What is the latency experienced by a memory controller on a row buffer hit?

What is the latency experienced by a memory controller on a row buffer hit?

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Expert Solution

Answer : Given data

Definition of latency is the delay between the user's action and web application's response for that action which was provided by the user.

In the other way, the definition of latency is defined as to in networking terms as the total round trip time it takes for a data packet to travel.

There are two types of latency. Good latency and bad latency.

And there are many causes of latency.

Good latency is nothing but, Latency is measured in milliseconds, and indicates the quality of your connection within your network. Anything at 100ms or less is considered acceptable for gaming. However, 20-40ms is optimal.

Causes for the latency are:

Typically, anything at 100ms is acceptable for gaming. However, the 20ms to 40ms range is considered optimal. So simply put, low latency is good for online gamers while high latency can present obstacles.

These is nothing but latency and causes of latency.

Now coming to Memor Controller.

Memory controller is nothing but it connects the CPU and DRAM i.e Control Processing Unit and Dynamic RAM.

> One of the function is Receives requests after cache misses in LLC.

-----Possibly originating from multiple cores.

> Complicated piece of hardware, handles:
-- DRAM refreshes the whole system.

--Row- buffer Management policies.

--Address mapping Schemes.

--Request Scheduling.

Coming to row- buffer Management Policies are:

Latency experienced by a memory controller on a row buffer hit.

There are two policies which shows the latency are: Open page policy and Close page policy.

Coming to open page policy:

>After access, keep page in DRAM row buffer.

> Next access to same page-------This shows the low latency which defines the latency value.

> It access to different page, must close old one first-----It describes the Good if lots the locality.

When coming to close page policy:

> Afetr access, immediately close page in DRAM row buffer.

> Next access to different page------ It describes the lower latency, i.e the value of the latency.

> If accessto different page, old one already closed.. It describes good if it has the no locality.

This is the latency experienced by a memory controller on a row buffer hit.

_____________THE END_______________


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