Question

In: Electrical Engineering

please can you do VHDL coding for 8:3 priority encoder with test banch and run and...

please can you do VHDL coding for 8:3 priority encoder with test banch and run and simulating in modelsim Also , can make the code easy to copy and big screen for waveform

please help me please

Expert Solution

--VHDL Code

library ieee;
use ieee.std_logic_1164.all;

entity p_encoder8to3 is
   port (   enable   : in std_logic;
       din   : in std_logic_vector(7 downto 0);
       dout   : out std_logic_vector(2 downto 0)
   );
end p_encoder8to3;

architecture arch of p_encoder8to3 is

begin

process (din, enable)
begin
   if (enable = '1') then        --active HIGH enable
       if (din(7) = '1') then
           dout <= "111";
       elsif (din(6) = '1') then
           dout <= "110";
       elsif (din(5) = '1') then
           dout <= "101";
       elsif (din(4) = '1') then
           dout <= "100";
       elsif (din(3) = '1') then
           dout <= "011";
       elsif (din(2) = '1') then
           dout <= "010";
       elsif (din(1) = '1') then
           dout <= "001";
       else
           dout <= "000";
       end if;
   else
       dout <= "ZZZ";
   end if;
end process;

end arch;

----------------------------------------------------------------------------------------------------------------------------------------------------------------------

--Testbench

library IEEE;
use IEEE.Std_logic_1164.all;
use IEEE.Numeric_Std.all;

entity p_encoder8to3_tb is
end;

architecture bench of p_encoder8to3_tb is

component p_encoder8to3
   port (   enable   : in std_logic;
       din   : in std_logic_vector(7 downto 0);
       dout   : out std_logic_vector(2 downto 0)
   );
end component;

signal enable: std_logic;
signal din: std_logic_vector(7 downto 0);
signal dout: std_logic_vector(2 downto 0) ;

begin

uut: p_encoder8to3 port map ( enable => enable,
din => din,
dout => dout );

stimulus: process
begin

   enable    <= '0';
   din   <= "11111111";
   wait for 20 ns;

enable <= '1';
wait for 10 ns;

din <= "01111111";
wait for 10 ns;

din <= "00111111";
wait for 10 ns;

din <= "00011111";
wait for 10 ns;

din <= "00001111";
wait for 10 ns;

din <= "00000111";
wait for 10 ns;

din <= "00000011";
wait for 10 ns;

din <= "00000001";
wait for 10 ns;

wait;
end process;

end;

---------------------------------------------------------------------------------------------------------------------------------------------------------------------

Manojponduru answered 11 months ago

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