Question

1.The machine code of LEGv8 instruction SUB X15,X16,X17 in hexadecimal is?

2.The LEGv8 assembly instruction assembled into the hexadecimal machine code D1001695 is?

3.What does the LEGv8 instruction below do?

LSL X12,X12,#8

Answer 1

1.

Above instruction is equivalent to :

X15 <- X16 - X17

SUB is a R-type instruction, with the following fields :

• First 11 bits = Opcode = 1100 1011 000
• Next 5 bits = Second source register = X17 = 1 0001
• Next 6 bits = Shift amount = 0 = 0000 00
• Next 5 bits = First source register = X16 = 10 000
• Next 5 bits = Destination Register = X15 = 0 1111

Writing all bits together, we get

= 1100 1011 000 1 0001 0000 00 10 000 0 1111

= 1100 1011 0001 0001 0000 0010 0000 1111

= 0xCB11020F

2.

Expanding the intruction 0xD1001695, we get

1101 0001 0000 0000 0001 0110 1001 0101

Here, the first 10 bits are

1101 0001 00

which is 10-bit opcode for SUBI, which is an I-type instruction.

Thus, the next fields are :

• Next 12 bits = Immediate operand = 00 0000 0001 01 = 5
• Next 5 bits = Source Register = 10 100 = X20
• Next 5 bits = Destination Register = 1 0101 = X21

Thus, the operation is

X21 <- X20 - 5

and the assembly instruction is

SUBI X21, X20, #5

3.

LSL stands for Logical Shift Left, where the vacated (lowermost) bits are filled with 0s.

Thus,

LSL X12,X12,#8

=> X12 <- X12 << 8

where,

• X12 is the register that is shifted left 8 times, filling the lowermost vacated 8 positions with 0s.
• X12 is also the destination register, and thus the final result gets stored in X12 itself.