Question

2.

Given the Instruction sets for Machine-1, Machine-2 and Machine-3, write programs to calculate: P= ((B×C) + (A +D)) / (E - C × D) and comment on relative efficiency. Machine-1: One address instructions Machine-2: Two address instructions Machine-3: Three address instructions STORE X ; X<― [AC] LOAD X ; AC<― [X] MPY X ; AC<― [AC x X] DIV X ; AC<― [AC / X] ADD X ; AC<― [AC + X] SUB X ; AC<― [AC -X] X could be memory address/CPU register/variable MOV X, Y ; X<― [Y] MPY X, Y ; X<― [X x Y] DIV X , Y ; X<― [X / Y] ADD X, Y ; X<― [Y + X] SUB X, Y ; X<― [X - Y] X and Y could be memory addresses/CPU registers/variables MOV X, Y ; X<― [Y] MPY Z, X, Y ;Z<― [X x Y] DIV Z, X , Y ; Z<― [X / Y] ADD Z, X, Y ; Z<― [Y + X] SUB Z, X, Y ; Z<― [X - Y] X , Y and Z could be memory addresses/CPU registers/variables …..

Answer 1

Given

One address machine instructions:

LOAD E AC<-- [E]

SUB C AC<--[AC - C]

MPY D AC<-- [AC D]

STORE T T <--AC

LOAD B AC<-- [B]

MPY    C AC<-- [AC C]

STORE P P <--AC

LOAD    A AC<-- [A]

ADD D AC<-- [AC+D]

ADD P AC<--[AC+P]

DIV T AC<--[AC/T]

STORE P P<--[AC]

Two address machine instructions:

MOV R1,E R1<--[E]

SUB R1,C   R1<--[R1-C]

MPY R1,D R1<--[R1D]

MOV R2,B    R2<--[B]

MPY R2,C R2<--[R2 C]

MOV R3,A R3<--[A]

ADD R3,D R3<--[R3+D]

ADD R2,R3 R2<--[R2+R3]

DIV R2,R1 R2<--R2/R1

MOV P,R2 P<--R2

Three address instructions:

SUB R1,E,C R1<--[E]-[C]

MPY R1,R1,D R1<--R1D

MPY R2,B,C R2<--BC

ADD R3,A,D R3<--A+D

ADD R2,R2,R3 R2<--R2+R3

DIV P,R2,R1 P<--R2/R1

EFFICIENCY IS IN THIS ORDER:

ONE ADDRESS >TWO ADDRESS >THREE ADDRESS

AS THERE IS INCREASE IN NO OF ADDRESSES THERE WILL BE INCREASE IN MEMORY ACCESSES

IF MEMORY ACCESSS INCREASES EFFICIENCY DECREASES .

FOR ONE ADDRES REQUIRES LESS NO OF MEMORY ACCESSES THAN TWO ADDRESS AND TWO ADDRESS REQUIRE LESS MEMORY ACCESSES THAN THREE ADDRESS

EFFICIENCY WILL BE REVERSE OF MEMORY ACCESSES THAT IS

ONE ADDRESS >TWO ADDRESS >THREE ADDRESS