Design and Test an 8-bit Adder using 4-bit adder. Use
4-bit adder coded in class using full adder that is coded
using data flow model. Use test bench
to test 8-bit adder and consider at least five different test
vectors to test it.
6. (5pts) Using four 1-bit full adders only to design a four-bit
combinational Excess-3 to BCD converter. Show the block diagram and
label all inputs and outputs
1)
A. In a 1 bit half adder which design is the sizing of the
transistor most area efficient, CMOS logic, transmission gate, or
dynamic logic. Explain.
B. If the W/L of the transistors at gate level are the same,
which one will be the fastest driving the same amount of load.
Explain.
C. Which is the most power efficient?