Question

Complete the AVR assembly language fragment below so that it performs a division by 2 of the 24-bit two's complement value in registers r6:r5:r4. (r6 is the most significant byte.)

lslasllsrasrrolrorr4r5r6  lslasllsrasrrolrorr4r5r6
lslasllsrasrrolrorr4r5r6  lslasllsrasrrolrorr4r5r6
lslasllsrasrrolrorr4r5r6  lslasllsrasrrolrorr4r5r6

Answer 1

Complete the following AVR assembly language code to divide 24-bit two's complement value by two that is stored in registers r6:r5:r4:

Answer:

ASR r6

ROR r5

ROR r4

Description:

• ASR: Arithmetic Shift Right

ASR Rd - The asr instruction shifts all the bits of the register Rd one place to the right side. Bit 7 will be held constant and bit 0 will be loaded into Carry flag.

• ROR - Rotate Right through Carry

ROR Rd - The ror instruction shifts all the bits of the register Rd one place to the right side. Carry flag will be shifted at bit 7 and bit 0 will be shifted at Carry flag.

Example:

• Consider the following example where we want to divide (-4) by two.

• 24-bit signed or 2's complement value: 1111 1111 1111 1111 1111 1100 (-4).

r6 = 1111 1111 (most significant byte)

r5 = 1111 1111

r4 = 1111 1100

ASR r6 ; Arithmetic Shift Right the r6 register. Now r6 = 1111 1111 with Carry = 1

ROR r5 ; Rotate Right through Carry r5 register. Now r5 = 1111 1111 with Carry = 1

ROR r4 ; Rotate Right through Carry r4 register. Now r4 = 1111 1110  with Carry = 0

• r6:r5:r4 = 1111 1111 1111 1111 1111 1110 (-2)

• So, we get the division of (-4) by two as (-2).