Question

State Machines

Your state machine should decode the following serial bit patterns in the correct order, with one bit per clock cycle.

State Machine: 110110

Please do

a.    A state diagram

b.    An explanation of your design process. Be sure to include a reset or idle state

c.    The state machine description

d.    Your state assignments

e.    Your next state table

Answer 1

(b) Mealy State Machine is shown above. here output depends on current state and present inputs. As shown S0 - S5, are the 6 different states. S0 is the idle/reset state. Transition from S0 to S1 state will happen only if the input say X=1 else S0 state is retained. Sequence "110110" is detectected with overlap.

(c) Total of 6 states requires minimum three D-Flip Flops in binary encoding technique. Output of theses D-Flip Flops along with input X will decide Next state as well as output.

Output is 1 only when from S5 state the input X=0.

(d) S0 = 000

S1=001

S2=010

S3=011

S4=100

S5=101

(e)

CURRENT STATE			INPUT	NEXT STATE			OUTPUT
Q2	Q1	Q0	X	Q2+	Q1+	Q0+	Z
0	0	0	0	0	0	0	0
0	0	0	1	0	0	1	0
0	0	1	0	0	0	0	0
0	0	1	1	0	1	0	0
0	1	0	0	0	1	1	0
0	1	0	1	0	1	0	0
0	1	1	0	0	0	0	0
0	1	1	1	1	0	0	0
1	0	0	0	0	0	0	0
1	0	0	1	1	0	1	0
1	0	1	0	0	0	0	1
1	0	1	1	0	1	0	0
1	1	0	0	X	X	X	X
1	1	0	1	X	X	X	X
1	1	1	0	X	X	X	X
1	1	1	1	X	X	X	X