Question

In: Physics

How can we fabricate a n-MOS and p-MOS with the same Carbon Nano Tubes? What are...

How can we fabricate a n-MOS and p-MOS with the same Carbon Nano Tubes? What are its advantages and disadvantages?

Solutions

Expert Solution

The fabrication of CMOS can be done by following the below shown twenty steps, by which CMOS can be obtained by integrating both the NMOS and PMOS transistors on the same chip substrate. For integrating these NMOS and PMOS devices on the same chip, special regions called as wells or tubs are required in which semiconductor type and substrate type are opposite to each otherA P-well has to be created on a N-substrate or N-well has to be created on a P-substrate. In this article, the fabrication of CMOS is described using the P-substrate, in which the NMOS transistor is fabricated on a P-type substrate and the PMOS transistor is fabricated in N-well

Step-1 Primarily, start the process with a P-substrate.

Step 2 The oxidation process is done by using high-purity oxygen and hydrogen, which are exposed in an oxidation furnace approximately at 1000 degree centigrade.

Step 3 A light-sensitive polymer that softens whenever exposed to light is called as Photoresist layer. It is formed

Step 4-The photoresist is exposed to UV rays through the N-well mask

Step 5-A part of the photoresist layer is removed by treating the wafer with the basic or acidic solution

Step 6-The SiO2 oxidation layer is removed through the open area made by the removal of photoresist using hydrofluoric acid.

Step 7-The entire photoresist layer is stripped off

Step 8-By using ion implantation or diffusion process N-well is formed

Step 9-Using the hydrofluoric acid, the remaining SiO2 is removed

Step 10-Chemical Vapor Deposition (CVD) process is used to deposit a very thin layer of gate oxide

Step 11-Except the two small regions required for forming the Gates of NMOS and PMOS, the remaining layer is stripped off.

Step 12-Next, an oxidation layer is formed on this layer with two small regions for the formation of the gate terminals of NMOS and PMOS

Step 13-By using the masking process small gaps are made for the purpose of N-diffusion

Step 14- The remaining oxidation layer is stripped off.

Similar to the above N-diffusion process, the P-diffusion regions are diffused to form the terminals of the PMOS.

Step 15 -A thick-field oxide is formed in all regions except the terminals of the PMOS and NMOS.

Step 16- Aluminum is sputtered on the whole wafer.

Step 17 -The excess metal is removed from the wafer layer.

Step18- The terminals of the PMOS and NMOS are made from respective gaps

Advantages of Pmos=

PMOS technology is highly controllable.

It is a low cost process.

It has good yield and high noise immunity

Advantages of Nmos

  NMOS circuits offer a speed advantage over PMOS due to smaller junction areas. Since the operating speed of an MOS IC is largely limited by internal RC time constants and capacitance of diode is directly proportional to its size, an n-channel junction can have smaller capacitance. This, in turn, improves its speed

Disadvantages=

during the oxidation of silicon which takes place at the Si-SiO2 interface. No real abrupt change occurs between silicon and Sio2; rather there is a transition zone. This transition zone contains positively charged Silicon atoms which increase the absolute magnitude of the threshold voltage for a p-channel device and decrease the absolute magnitude of the threshold voltage for an n-channel device. This means it is difficult to make an n-channel device that is off at zero gate voltage.


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