Question

Show how each of the following C statements would be translated to ARM Cortex M3/M4
assembly language:
3.1. a |= (1<<3)
3.2. a &= ~(1<<1)
3.3. a ^= 1<<2
If a was an 8-bit variable with initial value 0xA7:
3.4. What would be its value after each operation, assuming each operation runs individually.

Answer 1

Position-autonomous code has the property that it will execute effectively regardless of where in memory it is stacked. So as to have this property, the code must contain no references to total articles. That is, any interior information or schedules got to must be referred to as for some fixed point in the program. As the balance from the necessary area to the fixed point stays steady, the location of the item might be determined paying little heed to where the program was stacked. Generally, addresses are determined concerning the current guidance. You would frequently observe directions of the structure:

.here ADD ptr, pc, #object-(here+8)

to get the location of article in the register ptr. The +8 section happens in light of the fact that the PC is consistently two guidelines (8 bytes) further on than the guidance which is executing, due to pipelining.

It is a result of the recurrence with which this count manifests that the ADR order is given. As we clarified in Chapter Four, the line above could be composed:

ADR ptr, object

There is no requirement for a mark: BASIC plays out the figuring utilizing the current estimation of P%.

Rather than utilizing PC counterbalances, a program can likewise get to its information utilizing base-relative tending to. In this plan, a register is picked to store the base location of the program's information. It is initialised in some position-free path toward the beginning of the program, at that point all information gets to are comparative with this. The ARM's register-counterbalance address mode in LDR and STR make this a serious clear method of getting to information.

Why make progress toward position-freedom? In a regular ARM framework, the projects you compose will be stacked into RAM, and may need to impart that RAM to different projects. The working framework will locate an appropriate area for the program and burden it there. As 'there' may be anyplace in the accessible memory range, your program can make no suspicions about the area of its inside schedules and information. In this way all references must be comparative with the PC. It is hence that branches use balances rather than total locations, and that the constructing agent gives the

LDR <dest>,<expression>

type of LDR and STR to consequently frame PC-relative locations.

Numerous microchips (particularly the more seasoned, eight-digit ones) make it difficult to compose position-free code as a result of inadmissible guidelines and designs. The ARM makes it moderately simple, and you should exploit this.

Obviously, there will undoubtedly be some outright references in the program. You may need to call outer subroutines in the working framework. The typical method of doing this is to utilize a SWI, which verifiably calls supreme location &0000008. Pointers gave to the program by memory-designation schedules will be total, yet as they are outside to the program, this doesn't make a difference. The thing to keep away from is supreme references to inside items.

Arrangements

These scarcely warrant a notice. As we have just inferred, ARM directions execute successively except if the processor is told to do something else. Succession of elevated level tasks:

LET a = b+c

LET d = b-c

would be executed by a comparable arrangement of ARM guidelines:

Include ra, rb, rc

SUB rd, rb, rc

In the event that type conditions

Think about the BASIC articulation:

On the off chance that a=b, THEN count=count+1

This guides very well into the accompanying ARM succession: