Question

In: Computer Science

Describe the status of the N, Z, C, and V flags of the CPSR after each...

Describe the status of the N, Z, C, and V flags of the CPSR after each of the following:
(a) ldr r1, =0xffffffff
ldr r2, =0x00000001
add r0, r1, r2
(b) ldr r1, =0xffffffff
ldr r2, =0x00000001
cmn r1, r2
(c) ldr r1, =0xffffffff
ldr r2, =0x00000001
adds r0, r1, r2
(d) ldr r1, =0xffffffff
ldr r2, =0x00000001
addeq r0, r1, r2
(e) ldr r1, =0x7fffffff
ldr r2, =0x7fffffff
adds r0, r1, r2

Solutions

Expert Solution

Denote the status of Z flag , N flag, C flag , and V flag after the execution of following instructions:

(a)

ldr r1, =0xffffffff ; load register with immediate value. r1 = 0xffffffff

ldr r2, =0x00000001 ; load register with immediate value. r2 = 0x00000001

add r0, r1, r2 ; Addition of the register r1 and register r2. r0 = r1 +r2

Answer:

Z flag: 0

N flag: 0

C flag: 0

V flag: 0

Description:

• The addition of r1 + r2 = 0xffffffff + 0x00000001 = 0x00000000 with carry = 1.

• Flags are not set as the instruction ADD does not have the suffix 'S' to execute it conditionally.

(b)

ldr r1, =0xffffffff ; load register with immediate value. r1 = 0xffffffff

ldr r2, =0x00000001 ; load register with immediate value. r2 = 0x00000001

cmn r1, r2 ; Comparison. Compare register as r1 + r2 and set the condition flags.

Answer:

Z flag: 1

N flag: 0

C flag: 1

V flag: 0

Description:

• The comparison of r1 + r2 = 0xffffffff + 0x00000001 = 0x00000000 with carry = 1.

• Z - Zero flag is Set as the comparison result is zero. Z = 1

• N - Negative flag is 0 as the comparison result is positive that means bit 31 is 0.

• C - Carry flag is set as the comparison result generates the carry. C = 1

• V - overflow flag is 0 as the comparison result does not produce overflow.

(c)  

ldr r1, =0xffffffff ; load register with immediate value. r1 = 0xffffffff

ldr r2, =0x00000001 ; load register with immediate value. r2 = 0x00000001

adds r0, r1, r2 ; Addition of the register r1 and register r2 and Set the conditional flags. r0 = r1 +r2

Answer:

Z flag: 1

N flag: 0

C flag: 1

V flag: 0

Description:

• The addition of r1 + r2 = 0xffffffff + 0x00000001 = 0x00000000 with carry = 1.

• Z - Zero flag is Set as the addition result is zero. Z = 1

• N - Negative flag is 0 as the addition result is positive that means bit 31 is 0.

• C - Carry flag is set as the addition result generates the carry. C = 1

• V - overflow flag is 0 as the addition result does not produce overflow.

(d)

ldr r1, =0xffffffff ; load register with immediate value. r1 = 0xffffffff

ldr r2, =0x00000001 ; load register with immediate value. r2 = 0x00000001

addeq r0, r1, r2 ; If the zero flag is set then perform the addition r0 = r1 + r2.

Answer:

Z flag: 1

N flag: 0

C flag: 1

V flag: 0

Description:

• If Z = 1 then addition of r1 + r2 = 0xffffffff + 0x00000001 = 0x00000000 with carry = 1.

• Z - Zero flag remains Set as the addition result is zero. Z = 1

• N - Negative flag is 0 as the addition result is positive that means bit 31 is 0.

• C - Carry flag is set as the addition result generates the carry. C = 1

• V - overflow flag is 0 as the addition result does not produce overflow.

(e)

ldr r1, =0x7fffffff ; load register with immediate value. r1 = 0x7fffffff

ldr r2, =0x7fffffff ; load register with immediate value. r2 = 0x7fffffff

adds r0, r1, r2 ; Addition of the register r1 and register r2 and Set the conditional flags. r0 = r1 +r2

Answer:

Z flag: 0

N flag: 1

C flag: 0

V flag: 1

Description:

• The addition of r1 + r2 = 0x7fffffff + 0x7fffffff = 0xFFFFFFFE.

• Z - Zero flag is 0 as the addition result is non-zero.

• N - Negative flag is set as the addition result is negative that means bit 31 is 1. N = 1

• C - Carry flag is 0 as the addition result does not generate the carry.

• V - overflow flag is 1 as the addition result produce an overflow. V = 1

(Overflow is detected when the result of two positive number generates negative result.)

venereology answered 7 months ago
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