Question

In: Computer Science

Question 2. Design a 16-1 MUX using any number of lower MUXs, such as 8-1 or...

Question 2.

Design a 16-1 MUX using any number of lower MUXs, such as 8-1 or 4-1 only. No other gates are allowed.

Solutions

Expert Solution

2.ANSWER

GIVENTHAT:

To Design a 16-1 MUX using any number of lower MUXs, such as 8-1 or 4-1 only. No other gates are allowed.

Constructing 16:1 multiplexer using 8:1 multiplexer:

Using "2" 8:1 multiplexers to design 16:1 multiplexer.

In case of 8:1 MUX:

number of inputs = 23 = 8

Therefore, 3 select lines.

In case of 16:1 MUX:

number of inputs = 2^{4} = 16

Therefore, 4 select lines.

Since the select lines are different for both, one select line has to be adjusted. It will act like an "enable".

Design:

There are 4 select lines namely "S0", "S1", "S2" and "S3". S3 is "enable" (En) and it is active low.

Table:


Related Solutions

1.Write verilog code for a 8:1 Mux using the blocks of 2:1 Mux; Draw the block...
1.Write verilog code for a 8:1 Mux using the blocks of 2:1 Mux; Draw the block diagram for this design and write the truth table to prove that the design works as intended. 2. Write verilog code for a 16:1 Mux using the blocks of 4:1 Mux; Draw the block diagram for this design and write the truth table to prove that the design works as intended.
design full adder using 4:1 mux
design full adder using 4:1 mux
I am trying to create an 8-bit random number generator in verilog code using a mux,...
I am trying to create an 8-bit random number generator in verilog code using a mux, a d flip flop and a LFSR not sure what I am doing wrong but need some help with getting it working properly any help would be greatly appreciated. here is what I have so far: module RNG #(parameter size=8)(output [7:0]SO,output [7:0] RN,input clk,rst,input[size-1:0]seed,input L);    wire [7:0] Sin=SO[7]^SO[5]^SO[4]^SO[3];    ffw F1 (SO,clk,rst,Sin);    MUX M1 (Sin,seed,{SO[size-2:0],next},L);    xor X1 (next,SO[6],SO[7]);    assign RN=next;...
NUMBER THEORY QUESTION: Find the partition of {1, 2, . . . , 16} determined by...
NUMBER THEORY QUESTION: Find the partition of {1, 2, . . . , 16} determined by the dynamics of (a) addition of 2, modulo 16. (b) addition of 4, modulo 16 (c) multiplication by 2, modulo 17. (d) multiplication by 4, modulo 17.
Question 1: A Multiplexer (MUX) a) Write truth table and draw symbol for a 4-to-1 MUX....
Question 1: A Multiplexer (MUX) a) Write truth table and draw symbol for a 4-to-1 MUX. (1 mark) b) Write VHDL code for the above multiplexer. (1 mark) c) Write VHDL code for a test bench and simulate the design. (1 mark) d) Implement the design on FPGA, with inputs connected to switches and output to LED. (1 mark)
Using the conditional assignment statements, write the verilog code for 16:1 Mux. Write the test bench...
Using the conditional assignment statements, write the verilog code for 16:1 Mux. Write the test bench for this module.
1. design a mod-16 ripple down counter using positive triggered 2. design a synchronous counter to...
1. design a mod-16 ripple down counter using positive triggered 2. design a synchronous counter to count in the following sequence : 15, 9,, 11, 5, 2, 13, 1
Design a 4-to-16-line decoder by using the minimum number of 2-to-4-line decoders. The 2- to-4-line decoders...
Design a 4-to-16-line decoder by using the minimum number of 2-to-4-line decoders. The 2- to-4-line decoders have an enable input (‘1’=enabled) and the designed 4-to-16-line decoder does not have an enable. Name the inputs A0...A3 and the outputs D0...D15.
Question #1 a) What is the major difference between a 4:1 MUX (multiplexer) and a 2:4...
Question #1 a) What is the major difference between a 4:1 MUX (multiplexer) and a 2:4 decoder? b) How many binary inputs would be needed for a decoder with 32 mutually-exclusive outputs? Please explain why. c) A data acquisition system has only one analog-to-digital (A/D) converter. You have 12 different analog inputs to select. Which of the following would you choose? 1) 8:1 MUX 2) 4:16 decoder 3) 16:1 MUX 4) 3:8 decoder Please explain why.
Design a security system using red, green, and yellow LEDS, along with MUX chip, buzzer and...
Design a security system using red, green, and yellow LEDS, along with MUX chip, buzzer and ultrasonic sensor.
ADVERTISEMENT
ADVERTISEMENT
ADVERTISEMENT