Question

Embedded computer systems:

Configure and code clock for Pic24e referring to the example C code given below.

a) Write code on how to configure bits that uses its fast RC oscillator with PLL to run at 40MHz. Assume the RC's frequency is 7.5MHz.

b) Write code on how to configure bits that uses its primary crystal (XT) with PLL to run at 40MHz. Assume the external clock is a crystal oscillator of 8MHz.

====== Given C Code =======

#include "ConfigurationBits.h"

void initializeSystem() {

// Configure the device PLL to obtain 60 MIPS operation. The crystal

// frequency is 8MHz. Divide 8MHz by 2, multiply by 60 and divide by

// 2. This results in Fosc of 120MHz. The CPU clock frequency is

// Fcy = Fosc/2 = 60MHz.

PLLFBD = 58; /* M = 60 */

CLKDIVbits.PLLPRE = 0; /* N1 = 2 */

CLKDIVbits.PLLPOST = 0; /* N2 = 2 */

/* Initiate Clock Switch to Primary

* Oscillator with PLL (NOSC= 0x3)*/

__builtin_write_OSCCONH(0x03);

__builtin_write_OSCCONL(0x01);

while (OSCCONbits.COSC != 0x3);

// Wait for PLL to lock

while (OSCCONbits.LOCK != 1);

}

Answer 1

//Main.c
#include <stdint.h>
#include "Compiler.h"
#include "ConfigurationBits.h"

// leds are connected to port D1..3

void initLeds() {
    TRISD &= 0xFFF1;
}

void ledOn(uint8_t sel) {
    LATD |= 1<<(sel+1);
}

void ledOff(uint8_t sel) {
    LATD &= ~(1<<(sel+1));
}

void ledToggle(uint8_t sel) {
    LATD ^= (1<<(sel+1));
}

void ledSet(uint8_t val) {
    LATD = (LATD & 0xFFF1) | ((val & 0x7) <<1);
}

int main() {
    initLeds();
    ledOn(1);
    ledOff(1);
    ledToggle(1);
    ledSet(5);
    return 0;
}

// PIC24EP512GU810 Configuration Bit Settings

// 'C' source line config statements

#include <xc.h>

// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GSS = OFF                // General Segment Code-Protect bit (General Segment Code protect is disabled)
#pragma config GSSK = OFF               // General Segment Key bits (General Segment Write Protection and Code Protection is Disabled)

// FOSCSEL
#pragma config FNOSC = FRC              // Initial Oscillator Source Selection bits (Internal Fast RC (FRC))
#pragma config IESO = ON                // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)

// FOSC
#pragma config POSCMD = XT              // Primary Oscillator Mode Select bits (XT Crystal Oscillator Mode)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF            // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECMD           // Clock Switching Mode bits (Clock switching is enabled,Fail-safe Clock Monitor is disabled)

// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON              // PLL Lock Wait Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = ON              // Watchdog Timer Enable bit (Watchdog timer always enabled)

// FPOR
#pragma config FPWRT = PWR128           // Power-on Reset Timer Value Select bits (128ms)
#pragma config BOREN = ON               // Brown-out Reset (BOR) Detection Enable bit (BOR is enabled)
#pragma config ALTI2C1 = OFF            // Alternate I2C pins for I2C1 (SDA1/SCK1 pins are selected as the I/O pins for I2C1)
#pragma config ALTI2C2 = OFF            // Alternate I2C pins for I2C2 (SDA2/SCK2 pins are selected as the I/O pins for I2C2)

// FICD
#pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config RSTPRI = PF              // Reset Target Vector Select bit (Device will obtain reset instruction from Primary flash)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)

// FAS
#pragma config AWRP = OFF               // Auxiliary Segment Write-protect bit (Aux Flash may be written)
#pragma config APL = OFF                // Auxiliary Segment Code-protect bit (Aux Flash Code protect is disabled)
#pragma config APLK = OFF               // Auxiliary Segment Key bits (Aux Flash Write Protection and Code Protection is Disabled)