Describe the development methodology and processes of (Model View Controller ) and explain how you would recommend it for a healthcare department?.

You have to design a novel CPV( Concentrated photovoltaic system) system,which has three level of optical elements(or concentration).Draw and explain the system in detail.?

Design E shape microstrip patch array antenna in ansys for a frequency and write the matlab code for it.

i need this all with matlab code.if you are able to do then try or else leave it for other.ONLY WANT MATLAB CODE

From "Digital Electronics a practical approach with VHDL" by William Kleitz 9th edition. FPGA question C10-6.The VHDL problem in Figure 10-42(a) is the implementation of a J-K flip-flop.

(a) Make the necessary program additions to provide active-LOW asynchronous Set and Reset. Save this program as prob_c10_6.vhd.

2) Counters
a) Design a two-bit counter of value AB which cycles through the following repeating pattern, using each of the following ?ip-?ops. Clearly show your design with all the necessary connections.
AB : 00 ?? 10 ?? 01 ?? 00 ?? 10···
i) two D-FFs ii) two T-FFs iii) two JK-FFs
b) Design a three-bit counter of value ABC which cycles through the following repeating pattern, using each of the following ?ip-?ops. Clearly show your design with all the necessary connections.
ABC : 001 ?? 100 ?? 011 ?? 010 ?? 001 ?? 100···
i) three D-FFs ii) three T-FFs iii) three JK-FFs

Name and defined a specific software architectures or development methodologies, and explain how it supports the development methodology and processes?

A three-phase asynchronous motor with 380 Δ / 660 λ, 35 Kw, 1400 rpm label on the label will be started in 380 volt network.
Draw the control and power circuit according to the requests below.
A) The motor will be turned right and left
B) Motor will be protected against overcurrent and two phases
C) The green lamp will light when the engine is turning to the right and the blue lamp will be turning when turning to the left.

What is flashover and arcing? How do they happen and why?

 How can we keep the terminal voltage equals to constant independently from load change?

Write a Matlab code for PSK modulation of Polar signal full widht rectangular pulses and data rate 1 mbit/s also find PSD of psk and estimate Bandwidth

A movie theater is planning to offer the possibility to book the seats either online or at the kiosk of the theater. Design the booking application for the theater taking in account the following consideration:

- The theater has 100 seats only.

- More than one user may be trying to book the same seat at the same time.

- Any seat can be booked by only one user.

- A seat can be available for the kiosk agent and the online user at the same time but can be booked by only one of them.

- If the client did not book a seat online or changed his/her mind at the kiosk, the seat must be available again for booking.

Use the process synchronization techniques. You are allowed to use variables as much as you need in the design.

The code does not have to be complicated or detailed. Thanks for the help!

The parameters of a 3-phase, 4-pole, 50 Hz, Y-connected, wound-rotor induction motor are listed below. These are the default values of the “Asynchronous Machine” model in MATLAB Simulink. r1=0.5968 ?; r2=0.6258 ?; L1=0.0003495 H; L2=0.005473 H; Lm=0.0354 H; Stator line voltage = 400 V rms. The motor for rotor speeds nm= 0 to 1500 rpm.

X1= 0.1097 ohm, X2= 1.719 ohm , Xm= 11.12 ohm, RTH = 0.5853 , XTH = 0.1395 and VTH = 230.82 V.

Suppose the motor is to rotate a fan for which the load torque is proportional to cube of the speed: ?m = (1.3×10^ -5 )*?m^3 where ?m is the fan speed in rad/s. Then use MATLAB to plot the torque-speed characteristic of the fan as the motor torque-speed characteristic. What would be the motor speed and torque?

*************** Please do not copy and paste from other answered questions on Chegg, *******************

Overview

In this assignment you are required to implement binary code comparator using Xilinx that it is compatible with the MXK Seven Segment Displays. You will draw your digital logic circuit using Xilinx and then simulate it to verify the functionality of your design.

Software Requirements

? Xilinx ISE 10.1 or higher

Specifications

Binary Code Comparator

The binary code comparator is to be implemented and made compatible with the seven 7-segment displays of the board. Represent the first five digits of your student number into binary. If a given decimal digit is odd, then the binary equivalent will be 1, otherwise it will be 0. For example, the student (decimal) number 99805234 will produce 11001. The user is to enter a 5-bit binary sequence one bit at a time. The five bits will be displayed on five of the seven segment displays. If the five entered bits equal to the stored binary code, then ‘E’ is to be displayed on the sixths seven- segment display. However, if the five entered bits do not equal the binary code, then ‘n’ is to bedisplayed. Note that you do not have to display bits as they are received in accumulating manner (as shown in the figure below), rather, you can display all five bits and the comparator outcome (‘E’ or ‘n’) when the fifth bit is received. All six seven-segment displays are to stay on for five seconds, then they will be erased. Once the displays are erased, the circuit will be ready for receiving a new set of five input bits.

- Reset: if pressed, the circuit will return to the initial state and all seven segment displays are to be erased.

- Input (could be received from a dipswitch in your MXK): to specify the binary input (1 or 0).

- Trigger (could be received from a pushbutton in your MXK): to allow the input to be received by the circuit.

- Clock: to alternate between the 7-segment displays (expected to be around 1000 Hz).

There are two sets of outputs, which are:

- d1, d2, ..., d7 (anodes to switch between the seven 7-segment displays)