WHAT IS THE PSEUDOCODE OF THE FOLLOWING PROBLEM?

Design a microcomputer system using a uP 8086 10 Mhz. This system must have a Coprocessor 8087, a parallel connector, a serial connector, ADC and DAC connector for data conversion, a 16 byte seven segment display, a 64-key matrix keyboard, a USB connector thru a DMA for high speed data transfer. A special connector to connect a printer. The system must have an interrupt controller to handle all the I/O interface. The main memory size will be 1 Mbyte.

Show all the diagrams needed to construct your design including all the I/O interface and devices connected, show a memory map and the type of memory you will need for you design including the configuration and decoding system. You must include the programming needed for set up the complete system. Use pseudo code for each driver and program each of the interface needed.

Can a 6,000 watt step down transformer power a house?

Derive the wave propagation equation for particle motion collinear with the direction of propagation. Assume a homogeneous, isotropic, linear-elastic, infinite, continuum medium. Follow your class notes, and clearly identify all assumptions made along the way. Then, assume the solution to the wave equation, i.e., the particle motion, replace into the differential equation and …. conclude!

1.)

A.) In a 5V system if you were asked to take one input HIGH and another LOW what would you do (i.e. where would you connect them)?

B.) If Vcc is 5.0V in CMOS logic, what are the acceptable high and low levels for the inputs?

C.) If Vcc is 5.0V in CMOS logic, what are the acceptable high and low levels for the outputs?

D.) You can directly connect any of the ICs from one logic family to another logic family (i.e. CMOS, TTL, LVTTL, HCMOS, etc.) together without concern that their input and output logic levels will be compatible: True or   False

E.) In any logic family would .25V be considered a logic low?    Yes or No

A 3 phase 50Hz overhead line has the following constants: R/phase=2ohms; Xl/phase=10ohms and Y/phase=4x10^-4 siemens. The line is supplying a balanced load of 24000 KVA, 0.8 pf lagging at 66KV. Compute for the sending end voltage, sending end current and efficiency of the line using:

a.Nominal T Method

b.Nominal pi Method

c.Rigorous Method

• Input pin(s): inputw [1], sysclock [1]
• Output pin(s): outputq [1]

Design a 3-bit parity generator using a minimal state table for a Moore model FSM. For every three bits that are observed on inputw during three consecutive clock cycles, the FSM generates the parity bit outputq = 1 if the number of 1s received in the sequence so far is odd.

Must use a maximum of 3 flip flops.

345 kV, 50 Hz, 3-phase transmission line is 100 km long. The resistance is 0.048 Ω/km and the inductance is 1,24 mH/km. The shunt capacitance is 0.0174 μF/km. The receiving end load is 216 MW with 0.8 power factor lagging at 325 kV.

(a) Compute ABCD parameters using π equivalent circuit

(b) Sending end voltage VS,

(c) Sending end current IS,

(d) Efficiency

A 230 V, 250 rpm, 100 A separately excited dc motor has an armature resistance of
0.5 Ω. The motor is connected to 230 V dc supply and rated dc voltage is applied
the field winding. It is driving a load whose torque-speed characteristic is given by

TL = 500 − 10ω

where ω is the speed in rad/sec and TL is the load torque in N-m. Find
(a) the steady state speed at which the motor will drive the load.
(b) the armature current.
Neglect the rotational losses of the machine.

QUESTION 7

1. Which has the greatest NPV assuming a 25 year planning horizon and MARR = 12%?

   		Install a $20,000 solar system that will last 25 years, and generate 38,000 kWh/year at $0.10/kWh.
   		Install a $25,000 Ground-Source Heat pump that will last 50 years and save $3,500/year.
   		Both options has equal NPV
   		Not possible to be calculated

a) In your own understanding draw a static PMOS and NMOS structure transistors
and explain how each operates as switch , illustrate your explanation with sketches.


b) Design a two way NOR Simple static CMOS Circuits , Explain the circuit topology
and its operation

c) At your level in the field of Electronics and electrical engineering ,draw the various
Field effect transistor (FET) possible configurations, In your own word and
understanding briefly analyze each configuration

Design and build an active second order low pass filter with cut off frequency of 8kHz using opamp

-Show circuit diagram

-Show input voltage and frequency

- Show all calculations and placement of indicator to measure output frequency to measure cut off

can you give an explanation of what it is and for what it uses

Optic switches and modulation (coherent modulation focus) on fiber optic tecnology

Given a cubic lattice, indicate how many equivalent planes are associated with each of the following plane group:

a, {1 0 0} b, {1 1 0} c, {1 1 1}

Sources are not all the same in the way they specify the output voltage. Some assume that a load with a resistance matching the output resistance is always present when you set the voltage. Other devices assume there is a high impedance load on the output. Which of the cases match the voltage settings for Elvis II? Explain your answer