In: Electrical Engineering
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Solution:
To design a counter that follows the sequence 1 - 1 - 3 - 0 - 2 - 2 - 6 - 0 - 1.
Since the question didn't specify synchronous or Asynchronous,
I consider Synchronous counter.
Step 1:
Construct the state transition diagram
Step 2:
By using the state transition diagram we can build the state transition table logic:
The total number of states is 9.
Present State | Next State |
---|---|
1 | 1 |
1 | 3 |
3 | 0 |
0 | 2 |
2 | 2 |
2 | 6 |
6 | 0 |
0 | 1 |
1 | 1 |
Step 3:
Construction of State Transition Table by using the state transition table logic
The maximum number in the sequence is 6,
We need a minimum of 3 binary bit to represent number 6,
So, lets us consider the state assignment as 3 binary for each number,
We can get the state transition table as follows:
Present State | Next State | ||||
---|---|---|---|---|---|
Q3 | Q2 | Q1 | Q3(t+1) | Q2(t+1) | Q1(t+1) |
0 | 0 | 1 | 0 | 0 | 1 |
0 | 0 | 1 | 0 | 1 | 1 |
0 | 1 | 1 | 0 | 0 | 0 |
0 | 0 | 0 | 0 | 1 | 0 |
0 | 1 | 0 | 0 | 1 | 0 |
0 | 1 | 0 | 1 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 |
0 | 0 | 0 | 0 | 0 | 1 |
0 | 0 | 1 | 0 | 0 | 1 |
Step4:
To design the sequence using flipflops
Let us consider the D-flipflop
the excitation table of the D-flipflop is given below:
Present state | Next State | D-Flip flop input(D) |
---|---|---|
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 0 |
1 | 1 | 1 |
We can observe that the input of the D-flipflop is equal to the next state;
Step5:
Construction of Circuit Excitation Table, we get
Step6:
Solving for the D flipflop inputs with respect to the present state, we get as
For DA by considering Q3, Q2, Q1,
we get as
Q3\Q2Q1 | 00 | 01 | 11 | 10 |
---|---|---|---|---|
0 | 1 | |||
1 |
we get DA = Q3' Q2Q1
For DB by considering Q3, Q2, Q1,
we get as
Q3\Q2Q1 | 00 | 01 | 11 | 10 |
---|---|---|---|---|
0 | 1 | 1 | 1 | |
1 |
we get DB = Q3'Q1' + Q3'Q2'
For DC by considering Q3, Q2, Q1,
we get as
Q3\Q2Q1 | 00 | 01 | 11 | 10 |
---|---|---|---|---|
0 | 1 | 1 | ||
1 |
we get DC = Q3'Q2'
Step 7:
By using the equation for the input of the D flip flop. let us construct the circuit,
we get the circuit as follows