what part of the power system is TCSC being implemented?
In: Electrical Engineering
In: Electrical Engineering
In: Electrical Engineering
I would like clarification on the movement of current. I have heard that current travels "path of least resistance", but I have never fully grasped the concept. I understand that current travels from higher potential to lower potential so does that mean that the higher the potential, the greater the resistance and therefore current travels path of least resistance?
In: Electrical Engineering
A discrete system is described by the difference equation y(n)= 2.5y(n-1)-y(n-2)+3x(n)+3x(n-2)
a. Using Z-transform, Determine all possible impulse responses h(n) and indicate the casuality and stability properties.
b.For the casual filter, determine the output y(n) if the input is x(n)=g(n)-2g(n-1) where g(n)=cos (pin/s)u(n).
In: Electrical Engineering
Explain the main purpose of an interrupt signal. Give an example of how the interrupt is used.
In: Electrical Engineering
Word Problem : Explain what is Z transform, and describe the relation of the Z transform and the DTFT.
In: Electrical Engineering
1. Design 3rd order ideal low pass filter H(s).
Two poles are complex conjugates, and one pole is on the real axis.
2. transform H(s) to H(z). (Use impulse invariance criterion)
1%criterion
In: Electrical Engineering
The total current density in a semiconductor is given as constant and Jtop = -20 A / cm ^ 2. Total current density is the sum of the hole drift current density and the electron diffusion current densities. The hole density in the crystal is constant and p = 0.64 * 10 ^ 10 cm ^ -3. Electron density (to be written in x distance micrometer) is given as n (x) = 2 * 10 ^ 15 * e ^ (- X / L) cm ^ -3 and L = 20 micrometer. Since the diffusion coefficient of electrons is Dn = 26 cm ^ 2 / s and the mobility of the holes is n = p = 440 cm ^ 2 / Vs:
a) Find the variation of the electron diffusion current density
depending on the location and draw approximately by stating the
important values,
b) Find the variation of the electric field applied to the
semiconductor depending on the location and draw the approximate
values by drawing them approximately,
c) Find the variation of the hole drift current density depending
on the location and draw approximately by specifying the important
values.
I need quick answer please.Thank you
In: Electrical Engineering
Design a 5-bit binary counter using JK flip flops. Draw the flip-flop circuit diagram, the state graph, the timing diagram, the truth table (with clk pulse) and the state table (with present and next states).
In: Electrical Engineering
You are testing a new GPS system for general aviation aircraft and have encountered some unexplained heating. Modeling the circuit as three resistors in series, R1 (2 Ω) is known while R2 and R3 are not. We measure voltage drops of V1= 1 V, V2 = 50 V, and V3 = 100 V respectively across the three resistors. Determine the resistance of the unknown resistors.
In addition to the above calculations, explain to a member of upper management why anomalous heating in this circuit is related to determining these values and hence may be beneficial to the future design operations.
In: Electrical Engineering
Design and implementation 4-bit binary full adder with fast carry using behavioral and structural style of modelling. (LS 7483)
I want logic diagram and its truth table also i want code for it in VDHL software
In: Electrical Engineering
Transmission lines theory", explain with it; transmission lines effects and their causes,
In: Electrical Engineering
In: Electrical Engineering
Your cache has a hit time of 1 clock cycle and a miss time of 100 clock cycles. If the CPI of your processor equals 1.3 with perfect caches (the cache always hits), then what is the CPI if your cache hits 71% of the time? Fill in the blank and show your work.
( )
Your cache has a miss penalty of 50 clock cycles and a hit time of 1 clock cycle. If your processor has a CPI of 1.5 with a perfect cache (it always hits), then what is your CPI if your cache always misses? one of them is correct.
a. 1.5 |
||
b. 50.5 |
||
c. 51.5 |
Multiple-level caches are used because they?
a. provide a balance between low hit time and low miss rate.
b. have a higher combined hit rate than a single-level cache of the same size.
c. remove the need for a secondary memory.
In: Electrical Engineering