Question

Q1) Discuss the top-down and the bottom-up digital design methodologies?

Q2) Explain the advantages and disadvantages of FPGAs compared to ASICs?

Q3) Explain the benefits of hierarchical design methodology in Verilog HDL?

Q4) Discuss the tradeoffs between PLDs and FPGAs devices?

Q5) Discuss the advantages and disadvantages of HDL modeling using built-in primitives and User Defined Primitives (UDPs)?

Q6) Discuss the tradeoffs between schematic-based design and HDL-based design?

Q7) Discuss the tradeoffs between PLDs and ASIC devices?

Q8) Discuss the advantages of using Electronic Design Automation tools in the hardware design flow?

Q9) Explain why UDPs are not always the appropriate method to design a block and sometimes it is easier to design blocks as a module?

Q10) List Five Verilog Gate Primitives?

Q11) Write a 6-inputs “NOR” gate using Verilog primitives?

Q12) Why it is important to decide whether a functional block should be described as a UDP or as a module?

Q13) Explain why it is important that the table of a UDP cover all input combinations?

Q14) Explain the advantages and disadvantages of FPGAs compared to Standard cells?

Q15) What are the advantages of HDL-based design methodologies over traditional methodologies such as schematic-based design for hardware design?

Q16) What is the effect of the delay on the output and how to deal with it?

Q17) Verilog is able to model a design at different levels of abstraction, explain the benefits of using behavior modeling to model a circuit compared to other modeling approaches such as switch level modeling or structural modeling using primitives?

Answer 1

Q.1) There are 2 types of methodologies used in digital designing:

• Top down methodology
• Bottom up methodology

Top down methodology:

• Firstly, define the top level block
• Now, split this top level block into relevant sub-blocks, called child blocks.
• Continue splitting the blocks to lower levels until it can't be split anymore and becomes a leaf block. This last level is the basic block which can't be further splitted.

Bottom up methodology:

• We start with last level having basic building blocks or leaf blocks
• We merge 2 or more leaf blocks into 1 macro block or merged block
• According to relevance, we keep on merging blocks into 1 and move upward levels until we have arrived at 1 top level merged block. This is the topmost level.

Consider the 4-bit parallel adder digital design as an example to understand the methodologies in depth.