Question

1. (20) Literature survey.

Write a mini report on promising photolithography technologies for nm critical features in future generations of semiconductor technology.

Answer 1

Abstract :-

Continuous rapid shrinking of feature size made the authorities to seek alternative patterning methods as the conventional photolithography comes with its intrinsic resolution limit. In this regard, some promising techniques have been proposed as next-generation lithography (NGL) that has the potentials to achieve both high-volume production and very high resolution. This article reviews the promising NGL techniques and introduces the challenges and a perspective on future directions of the NGL techniques. Extreme ultraviolet lithography (EUVL) is considered as the main candidate for sub-10-nm manufacturing, and it could potentially meet the current requirements of the industry. Remarkable progress in EUVL has been made and the tools will be available for commercial operation soon. Maskless lithography techniques are used for patterning in R&D, mask/mold fabrication and low-volume chip design. Directed self-assembly has already been realized in laboratory and further effort will be needed to make it as NGL solution. Nanoimprint lithography has emerged attractively due to its simple process steps, high throughput, high resolution and low cost and become one of the commercial platforms for nano fabrication. However, a number of challenging issues are waiting ahead, and further technological progresses are required to make the techniques significant and reliable to meet the current demand. Finally, a comparative study is presented among these techniques.

Introduction :-

In the last few decades, the semiconductor industries had followed the Moore’s law; the number of transistors per chip had been doubling each process generation. Figure 1 shows the logic transistor density over the last decade and the future trend using a quantity density metric. The linear scale implies a doubling of density every 2 years. Intel has announced the new 10-nm process that achieves 100.8 million transistors per square millimeter. This provides notable 2.7 times transistor density improvement over its predecessor and suggests that Moore’s law is likely not slowing down. This enhancement of transistor density has been done by shrinking the sizes of the transistors. However, the industries have demanded sub-10-nm nodes patterning to meet the growing requirements.

As reported by the International Technology Roadmap for Semiconductors 2015 (ITRS2015), new type of logic devices (Gate-all-around structures) have already been introduced [1]. These new devices will replace the fin structures soon. This report also demonstrates the development of many new types of memory devices that can be the possible alternatives in the future.

Fig. 1 Logic transistor density [2]
These new devices will also push patterning to manufacture even smaller nanostructures. Although this rapid shrinking of feature size permits for faster processing with more power efficiency at a lower cost, it intensely enhances the design complexity and introduces various manufacturing challenges. Table 1 shows the ITRS roadmap requirements for the lithography techniques. Consequently, lithography must accomplish the stringent industrial requirements with excellent capability to meet the future challenges.

Photolithography has been the dominant method of patterning nanoscale features for the microelectronics industries since the commencement of the ICs. Resolution enhancement technologies (RET) and immersion method enables the photolithography with patterning beyond its intrinsic resolution limit. RET improves the quality of an image. It generally includes phase shift mask, optical proximity correction (OPC), modified or off-axis illumination (OAI) and multiple patterning. Although they have extended the capability of the lithography process, these methods experience some restrictions as well. Phase shift method has some limitations on implementation of mask due to phase termination problems and mask fabrication difficulties. The OPC technique introduces layout restrictions and prohibitive costs to make the corrected masks, while OAI presents complexity to the illumination source in the wafer stepper and to the mask design.

Multiple patterning is the main technique for current sub-20-nm volume manufacturing, which enables to print the patterns that are smaller than the single exposure lithographic resolution limit using multiple process steps. There are many different techniques to implement multiple patterning including litho-etch-litho-etch (LELE), self-aligned double patterning (SADP) and self-aligned quadruple patterning (SAQP). However, more and more masks will be required for finer process nodes, resulting in prohibitively expensive manufacturing cost and it requires much tighter overlay control than single patterning [4]. 193-nm immersion lithography (193i) has given influential boost to the further development of microelectronics, and the 22- and 14-nm nodes are currently manufactured with multi-patterning immersion ArF lithography [5]. However, this technique brings enormous process challenges like leaching, immersion defects and the filling methods of a purified medium. Despite the challenges, it has been the mainstream lithographic technique used in manufacturing industries since last decade. Now it is reaching its intrinsic limits.

Despite the high-resolution capabilities, X-ray lithography (utilizes X-rays wavelength of 0.4–4 nm) techniques were proved unsuccessful to provide an economically attractive lithographic process due to some difficulties. One of them was to find the right combination of materials and wavelength. Wrapping of absorber material due to internal stresses is an issue to mitigate. Furthermore, the most critical point is the failure to furnish suitable masks as these masks had to be unity magnification and the requirement of creating the mask from adequately X-ray absorbing materials. Again, the requirement of thick absorber layers and membranous nature of the substrate made X-ray lithography unpopular in nanofabrication arena.

As the conventional photolithography has approached its ultimate limits, considerable efforts have been devoted to NGL techniques by various research laboratories and industries around the globe. These techniques are extreme ultraviolet lithography (EUVL), electron-beam lithography (EBL), focused ion beam lithography (FIBL), nanoimprint lithography (NIL) and directed self-assembly (DSA). They have the potentials as the replacement to conventional photolithography.

With the increasing in patterning resolution, resist is one of the key challenges for the adoption of the patterning techniques in HVM industries. The next-generation potential techniques drive the need for resist materials with high resolution, high sensitivity and low LWR. However, it is difficult to achieve high resolution, low line edge roughness (LER) and low sensitivity simultaneously due to an inherent trade-off relationship between each other (RLS trade-off). Therefore, the development of advanced resist materials will be required to break the RLS trade-off relationship. In addition, the next-generation resists must have the ability to mitigate the stochastic barrier. The advancement of new resist materials is entering a new age with the accompanied challenges and opportunities to fulfill the stringent requirements for the future patterning techniques. In this review report, we will discuss the mechanism, overall status and the challenging issues for the NGL techniques as well as the general issues related to resist materials.