In: Mechanical Engineering
Consider a clocked synchronous state machine with two inputs, A and B, and a single output Z that is 1 if
(1) A had the “same” value at each of the “three“ previous clock ticks, or
(2) B has been 1 since the last time that the first condition was true.
Otherwise, the output should be 0.
* Find the state/output table with the minimum state for this machine and draw the state diagram.
Clocked synchronous state machine
• A has a similar incentive at every one of the two past clock ticks, or
• B has been 1 since the last time that the primary condition was valid.
• Try:
– (A,B) = (0,0),(0,0),(0,1),(0,0)
– (A,B) = (0,0),(0,0),(0,1),(1,0)
• A has a similar incentive at every one of the two past clock ticks, or
• B has been 1 since the last time that the principal condition was valid.
• Try the succession (A,B) = (1,0), (1,0), (1,1), (0,0).
State Minimization
• Equivalence: – For the given info, two states are equivalent if their yields are the equivalent, and their next state is the equivalent or a proportionate one.State Assignment
State Assignment
• Procedures are worried about techniques for allocating twofold qualities to states so as to decrease the expense of the combinational circuit that drives the flip-flops.
• Methods: – Choose an underlying coded state which the machine can without much of a stretch be compelled to at reset. – Minimize the number of state factors that change on each progress. – Maximize the number of state factors that don't change
State Assignment
• Methods: – Exploit balances by relegating state factors
contrasting just in the slightest bit to the two states or
gatherings of states. – If there are unused states, at that point
pick the best of the accessible state-variable mixes to accomplish
the previous objective. – Decompose the arrangement of state
factors into singular bits or fields, with all-around characterized
meaning. – Consider utilizing more than the base number of state
factors to make disintegrated assignments conceivable.
1. Clocked Synchronous State-Machine Design (cont.)
State Minimization
The essential thought of formal minimization techniques is to recognize equal states, where two states are proportional in the event that it is difficult to recognize the state by watching just the current and future yields of the machine (and not the inner state factors).
A couple of equal states can be supplanted by a solitary state.
Two states S1 and S2 are proportionate if two conditions are valid.
First, S1 and S2 must create a similar incentive at the state-machine output(s); in the Mealy machine, this must be valid for all information blends.
Second, for each information mix, S1 and S2 must have either the equivalent next state or identical next state.