Question

AMicroprocessor Memory Bus: A microprocessor is clocked at a frequency of 3.75 GHz when communicating with memory on a printed circuit board (PCB). A 15 cm long transmission line fabricated on a substrate with relative permeativity Er = 4.4 connects the two components. The transmission line has a characteristic impedance of 50 Ohms. (A) Calculate the velocity of the signal through the wire. (B) If we want to read data from the memory, we will have to send a signal from the processor to the memory and then receive a signal from the memory. How long will it take to complete this process? (C) How many clock cycles will it take to complete a memory read? (D) Should we terminate (impedance match) either end of the transmission line? If so, at which ends and why?

Answer 1

Answer :- a) characteristic impedance = 377 / (epsilon_r x meu_r )^0.5 . Thus (1 /  (epsilon_r x meu_r )^0.5 ) = 50/377. So we can write velocity of signal in the bus = speed of light /  (epsilon_r x meu_r )^0.5

= 300000000 x (50/377) m/s

velocity of signal in wire = 3.9877798 x 10⁷ m/s.

b) For two way communication, total length covered = 30 cm = 0.3 m. Thus as per above velocity, total time taken to complete the read operation = 0.3 / ( 3.987 x 10⁷ ) s = 7.524 ns.

c) clock frequency = 3.75 GHz, thus one clock cycle time = 1 / 3.75 ns = 0.2667 ns.

Since memory read takes 7.524 ns, thus in this time time interval, number of clock cycles

= 7.524 / 0.2667

= 28.211 or 29 clock cycles

d) Here both ends are working as source and load. Hence both ends should be matched with impedance of transmission line. Matching of impedance is done to remove the reflecstion of signal on the transmission line.