Question

How is it that the silicon ICs industry can burn ICs of a dozen nanometers using photolytography with UV laser of about 193 nanometers?

Since the gates are smaller than the wavelength, for example 22 nm, the mask would filter/diffract the light, right?

Answer 1

It is true that older litography used a more simple approach with a light source and a mask, but as you note, today structures much smaller than the wavelength of the illuminating light can be etched on the IC.

There are a huge number of techniques involved to improve on this, and I'm just an interested observer in this, but I would say that phase-shift masks (PSMs), where the wave properties of light are actually used for us instead of against us, is what answers your question and context best.

If you design a mask, not just as a silhouette of what you're trying to etch, but with, for example, varying transparent thicknesses, you can modulate the wave interference of the light passing through it and create much sharper structures in the etch than you could have done when using it as a simple shadow mask.

In the illustration below, the leftmost picture shows what you get with a simple shadow mask, and the three other pictures show various PSM techniques where the wave interference of the transmitted light create sharper details on the etch.

This review article summarizes a lot of the PSM techniques and has some nice illustrations and electron microscope photos.

Furthermore, the combination of clever arrangements of photoresists, multiple exposures and etching techniques enable even higher resolutions of the final patterns. As a very simple example, if you design a photoresist process that produces lines in the target for both deeply exposed and unexposed peaks, you get two actual lines of half width for each dark/light band your mask transmits.There are a lot of illustrations of this on the Wikipedia page for multiple patterning.

Note that it's no longer a general procedure where the designer can simply design a pattern which is smaller and get it etched perfectly using the PSM, optical proximity correction (OPC)and other methods. The price you pay for getting smaller features is a much more complicated ruleset and design process on the pattern. I guess the benefits are best exploited in heavily repeated structures, where a small pattern can be super-optimized for this, such as in memory chips. Flash-memory (storage for SSDs, SD cards, etc.) is one of the first categories of ICs that always get the new and updated process shrinks.

Well, this was an extremely superbrief summary of a multi-multi billion dollar R&D field