In: Computer Science
Given a memory address of 34Ah (10 bits) with 4 memory banks. Determine the memory bank address and the address of the word in the bank using Low Order Interleaving (LOI).
Memory Interleaving is a technique used to increase the preformance of the system in terms of memory access. As per this technique, Memory will be divided into banks and these banks will be accessed in parallel so that more than one word can be fetched within a clock cycle. Interleaving is of two types and each has its own advantages and disadvantages. They are :
In Higher Order Interleaving, higher order bits of the address (Most significant bits) are used to select the bank, and rest of the bits are used to select the word within the bank. This representation is also known as 'Consecutive words within a bank'. In this requests to different banks can be serviced in parallel because the words are contiguously allocated accross the memory banks. If a new bank need to be added it can be added after the last memory bank without disturbing the other banks. When a block need to be transferred to cache using Higher order interleaving, only one bank access is enough. If any bank fails, then memory requests related to other banks can be carried.
In Lower Order Interleaving, lower order bits of the address (least significant bits) are used to select the bank, and rest of the bits are used to select the word within the bank. This representation is also known as 'Consecutive words in consecutive banks'. As per this interleaving, in one clock cycle, more than one word can be fetched, by accessing banks in parallel. But more than one request cannot be serviced in parallel because a memory request may access all the banks as the consecutive words are in consecuitve banks . If any new bank need to be added, then all the banks should be adjusted so it's diffifcult compared to higher order interleaving. When a block need to be transferred to cache, all banks may be accessed. If any bank fails, then no memory request can be handled because words are distributed across the banks.
The given hexadecimal address is 34A H
Its binary equivalent will be 0011 0100 1010
Since the address is of 10 bits, ignore most significant two bits. So the address will be 1101001010
It is given that 4 memory banks are present. So to access 4 banks, log24 = 2 bits will be needed. As per LOI, least significant two bits will be used to access the bank and rest 8 bits is used to access the word within bank.
Address to the bank | Bank Select |
11010010 | 10 |
So the selected bank is Bank 2 ( 2 is decimal equivalent of 10) and the address of word within bank will be 11010010 = D2 H.