Question

In: Computer Science

Problem 3. A digital computer has a memory unit with 32 bits per word. The instruction...

Problem 3. A digital computer has a memory unit with 32 bits per word. The instruction set consists of 122 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. a) How many bits are needed for the opcode? b) How many bits are left for the address part of the instruction? c) What is the maximum allowable size for memory? d) What is the largest unsigned binary number that can be accommodated in one word of memory?

Expert Solution

Given:

Word size = 32 bits

number of operations = 122

size of each instruction = 1 word = 32 bits

a) How many bits are needed for opcode?

=> bits for opcode = upper bound of log₂(122) = 7 bits

b) How many bits are left for the address part of the instruction?

=> address bits = total bits in instruction - bits for opcode = 32 - 7 = 25

c) What is the maximum allowable size for memory?

As calculated in previous part size of each address = 25 bits

Assuming word addressable means each locations holds 1 byte of data.

=> maximum size of memory = 2²⁵ bytes = 33554432 bytes = 32 MB

If instead word addressable, then word size = 32 bits = 4 bytes

=> maximum size of memory = 32 x 4 MB = 128 MB

d) What is the largest unsigned binary number that can be accommodated in one word of memory?

As word size = 32 bits

So largest unsigned number in binary = all 32 bits are 1's = 2³² - 1 = 4294967295 in binary

venereology answered 7 months ago

13. A digital computer has a memory unit with 32 bits per word. The instruction set...

13. A digital computer has a memory unit with 32 bits per word. The instruction set consists of 260 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. a) How many bits are needed for the opcode? b) How many bits are left for the address part of the instruction? c) What is the maximum allowable size for memory? d) What...

A digital computer has a memory unit with 32 bits per word. The instruction set consists...

A digital computer has a memory unit with 32 bits per word. The instruction set consists of 122 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. a) How many bits are needed for the opcode? b) How many bits are left for the address part of the instruction? c) What is the maximum allowable size for memory? d) What is...

In a computer instruction format, the instruction length is 11 bits and the size of an...

In a computer instruction format, the instruction length is 11 bits and the size of an address field is 4 bits. Is it possible to have 5 two-address instructions 45 one-address instructions 32 zero-address instructions using the specified format? Justify your answer.

In a computer instruction format, the instruction length is 12 bits and the size of an...

In a computer instruction format, the instruction length is 12 bits and the size of an address field is 5 bits. The system architect has already designed three 2-address instructions and thirty one 1-address instructions. How many 0-address instructions can still be possibly accommodated?

In a computer instruction format, the instruction length is 16 bits and the size of an...

In a computer instruction format, the instruction length is 16 bits and the size of an address field is 4 bits. Is it possible to have: 15 instructions with 3 addresses, 14 instructions with 2 addresses, 31 instructions with one address, and 16 instructions with zero addresses, using this format? Justify your answer.

Example: A 3-address computer has 40 instructions, 16 Registers, and 256KB memory. Assume each instruction has...

Example: A 3-address computer has 40 instructions, 16 Registers, and 256KB memory. Assume each instruction has three operands. Two registers and the third operand is a direct address location of a memory. Find minimum size of PC, MAR, MDR, IR. Solution: OPCODE R1, R2, address OPCODE is 6 bits since 2^6>40 Register field is 4 bits since 2^4 =16 Memory field is 18 bits since 2^18=256K Instruction length =6+4+4+18=32 bits MDR=32 bits IR=32 bits MAR=18 PC=18 Please explain

A digital signal has four levels. How many bits are needed per level? Draw the digital...

A digital signal has four levels. How many bits are needed per level? Draw the digital signal assume the baud rate is 8 baud per second. Increasing the levels of a signal increases the probability of an error occurring, in other words it reduces the reliability of the system. Why and how can this be resolve? What determines how successful a receiver will be in interpreting an incoming signal? Spectrum of a channel between 5 MHz and 4 MHz; SNRdB...

Computer Architecture 1. Define what a "word" is in computer architecture: The size (number of bits)...

Computer Architecture 1. Define what a "word" is in computer architecture: The size (number of bits) of the address The total number of bits of an instruction (e.g. 16 bits) Word and width are synonymous. A word is the contents of a memory register. 2. What is the difference between a register’s width and a register’s address? (choose all that apply - there may be more than one correct answer) They are both the same! Address is the same for...

A 64 bit computer uses a memory of 32KB. Work out the number of bits of...

A 64 bit computer uses a memory of 32KB. Work out the number of bits of AR, DR, PC, AC, and the HEX code of the address of last memory location. b) The memory attached to a processor has access time of 400ns. When a cache memory is introduced in the system, it is found that on average the access time for the computer was 30% greater than the cache access time for a miss ratio of 0.10. Work out...

Assume that a ﬂoating-point number system has base 2, word length 32 bits, mantissa length 24...

Assume that a ﬂoating-point number system has base 2, word length 32 bits, mantissa length 24 bits, and does rounding. Assume also that the ﬁrst bit is implicit. Represent the numbers 1/2, 2/3 and 3/5 as ﬂoating-point numbers in this system. (Hint: For less confusion, you might want to write out all 25 binary digits.) Could you please me give me full procedure?