Question

1. 1) Draw the basic(1bit) cell of SRAM and DRAM. And compare the pros and cons of SRAM and DRAM with each other in terms of operation, area, and density

2) Explain the DRAM Read/Write circuits and their operation

Thank You

Answer 1

1.

  

Figure. 1-bit DRAM cell Figure.1-bit SRAM cell

Comparison Table:-

	DRAM	SRAM
1.Operation	DRAM uses capacitors that lose charge over time due to leakage, even if the supply voltage is maintained. Since the charge on a capacitor decays when a voltage is removed, DRAM must be supplied with a voltage to retain memory (and is thus volatile). Capacitors can lose their charge a bit even when supplied with voltage if they have devices nearby (like transistors) that draw a little current even if they are in an “off” state; this is called capacitor leakage. Due to capacitor leakage, DRAM needs to be refreshed often.	SRAM does not use capacitors. SRAM uses several transistors in a cross-coupled flip-flop configuration and does not have the leakage issue and does not need to be refreshed.SRAM does not use capacitors. SRAM uses several transistors in a cross-coupled flip-flop configuration and does not have the leakage issue and does not need to be refreshed.
2.Area	Since DRAM uses only one transistor and one capacitor for 1-bit storage, the area used by DRAM will be less when compared to SRAM.	Since SRAM uses 6 transistors for 1-bit storage area occupied will be more compared to the DRAM.
3.Density	For the same area, DRAM can accommodate more number of transistors when compared to SRAM. Hence the Density of DRAM is high compared to SRAM.	For the same area, SRAM can accommodate less number of transistors when compared to DRAM. Hence the Density of SRAM is less compared to DRAM.

2.

Figure. 1-bit DRAM cell

The level of charge on the memory cell capacitor determines whether that particular bit is a logical "1" or "0" - the presence of charge in the capacitor indicates a logic "1" and the absence of charge indicates a logical "0".

WRITE OPERATION:

For a write operation,

Initially, the Bit Line is activated with the bit to be stored in the transistor i.e., for storing bit 1, Bit Line is connected to V_dd, for storing bit 0, Bit Line is connected to 0volts.

After connecting the Bit Line to the desired voltage, now we need to switch ON the transistor so that the Voltage on Bit Line gets transferred onto capacitor i.e., make WordLine=V_dd then after some time make the WordLine=0 and after that disconnect the BitLine.

Precaution: BitLine should never be disconnected before turning OFF the transistor as this would lead to the discharge of the Capacitor.

However, the capacitor will discharge hence periodical charging of the capacitor is needed.

READ OPERATION:

For READ operation,

Now initially, WordLine is made HIGH, then the transistor turns ON and the charge stored on the capacitor is fled out onto a Bit Line and to sense. Sense amplifiers compare the capacitor voltage to reference value to determine the logic 1 or logic 0. The readout from the cell must be restored to complete the operation.