I have this MIPS code and I need to find:

add f,g,h

add f,f,i

sub f,f,j

a. How many bits does it take to encode ?

b. How many bits needed in register file to store the data?

List and briefly characterize the requirements for power protection devices and systems. Which of the requirements do you think are the most important?

If we want to pattern thick film (i.e. metal Ni, 3 micrometer) on a 4 inch Si wafer by electrochemical deposition, please give a possible sketch for the deposition, and comment deposition parameters for the process.

Design an analog elliptic lowpass IIR filter with specifications Fp=10 kHz., Ap=1 dB, Fs=15 kHz. And As=50 dB. Provide the following plots in MATLAB:

a. Magnitude

b. Log-magnitude

c. Group-delay

d. Impulse response

e. Pole-zero

a) Define: rise time, peak over shoot and settling time. b) Explain about the time constant of first order system.

What is KCL? Give an example of the application of KCL. In this example, make sure to include all the KCL equations.

A three-phase motor is delta connected to a 415 V, 60 Hz line. If the line current is 25 A and the motor power factor is 0.75, how much power is consumed by the motor (a) Determine the size of the bank of three capacitors to improve the power factor of the motor to 0.95. The capacitors are delta connected. (b) If two of the motors work together, what is the size of capacitors to correct the power factor to 0.95 if delta connected?

Verify the operation of a D flip-flop by providing appropriate inputs to the D, Preset, and Clear pins. Use CLOCK input to the flip-flop to function properly ( can be found under wiring in Logisim)

//If you present a diagram designed in the "Logisim app" it would be very much appreciated. Thank you

Draw circuit schematic of DRAM and answer the following questions

▪ Why NMOS is used as a pass transistor in the conventional DRAM, not PMOS?
▪ Explain how capacitor retain data in DRAM
▪ If PMOS is used in DRAM instead of NMOS, suggest a method to increase its performance. Provide reason to support your answer

For a 2-input NAND gate, determine transistor sizes such that the effective resistances for charging and discharging are comparable to those of the reference inverter. Then estimate its worst-case input-to-output delay, a.k.a. propagation delay, for rising output transition ( ? pdr.est).

Coin toss experiment In this experiment, determine the number of heads and tails after flipping a coin for 1000 times. Use two different methods to find number of heads and tails Use for loops Use vectors in MATLAB. Repeat this experiment to find running average of flipping a coin for 200 and 2000 times. Plot the running average for two experiments using subplot functions

if you are designing a photovoltaic solar system for a university building, estimate the total load for the building. please show the different loads for each component ( projector, computer, lights, printers,etc...) in watts? how many of these are in the building and whats the total load? assume the building area?

Interpolation Filters. Write a Matlab program to read and upsample the linked voice_samp_8k.wav file (below -- sampled at Fs=8000 samples per second) by an integer factor L (you can choose, probably in the range from 3 to 7 or so). Then use interpolation filtering to produce the following outputs and listen to them and plot short segments (~50-100 samples) of these outputs: (i) upsample only with no interpolation filtering, (ii) hold interpolation implemented directly as a causal FIR filter, (iii) linear interpolation implemented directly as a causal FIR filter, and two other designed FIR lowpass interpolation filtering with (iv) shorter (~20-200) FIR filters and (v) longer (~200-2000) FIR filters that you design with fir1(). Verify that your program is doing what you want by looking at plots of the various outputs. Also note any interesting observations.

-Explain step by step the operation of sequential logic circuit for traffic light ? digital system...

-Analyse the sequential logic circuit operation by using timing diagrams (with sketch for the diagrams) and present the optimization process of the sequential logic circuit.

- Propose an enhancement for your design by using different sequential logic circuit.

Please explain step by step with cleat hand writing..

Thanks.