In: Electrical Engineering
Explain the operation(s) performed by a return from an IRQ or FIQ interrupt procedure
Normal Interrupt (IRQ) or Fast Interrupt (FIQ) are exceptions which are generated by external hardware signals. When an exception occurs, ARM completes current instruction as best it can. It departs from the current instruction sequence to handle the exception by performing the following steps:-
1. It changes the operating mode corresponding to the particular exception.
2. It saves the current Program Counter (PC) to the new mode.
3. It saves the old value of CPSR in the Saved Processor Status Register of the new mode.
4. It disables exceptions of lower priority.
5. It forces the PC to a new value corresponding to the exception. This is effectively a forced jump to the Exception Handler or Interrupt Service Routine. A unique address is pre-defined for each exception handler (IRQ, FIQ, etc), and a branch is made to this address. The address to which the processor is forced to branch to is called the exception/interrupt vector.
Once the exception has been handled (by the exception handler), the user task is resumed. The Interrupt Service Routine must restore the user state exactly as it was before the exception occurred:
1. Any modified user registers must be restored from the handler’s stack. This must be done by the user.
2. The Current Program Status Register (CPSR) will be restored from the appropriate Saved Processor Status Register (SPSR) by the processor. This will be the same as in the case of subroutines.
3. PC must be changed back to the instruction address in the user instruction stream by the user.
Since exceptions can arise at the same time, a priority order has to be clearly defined. If an FIQ and IRQ are occurring at the same time, the FIQ will have higher priority. The ARM microcontroller will attend the FIQ exception and remember that the IRQ handler. After the exception returns from FIQ, the Interrupt Service Routine will return to the IRQ.