Question

12.2.1 - If you are using the Timer_B system and want to select ACLK as the clock source, what should you set TBSSEL to?

Question 1 options:

	11
	01
	00
	10

12.2.3 - If you are using the Timer_B system and want to divide the incoming clock by 2 using the first divider stage, what should you set ID to?

Question 2 options:

	11
	00
	01
	10

12.2.6 - If you are using the Timer_B system and want to divide the incoming clock by 7 using the second divider stage, what should you set IDEX to?

Question 3 options:

	110
	101
	001
	010
	011
	111
	100
	000

Answer 1

To select the particular configuration for the microcontroller, it's datasheet help to find functionality. So, I think that Controller name is missing in question. So, specific answers cannot be given to that. But we can make general comment:

1. To select the type of clock used by the Timer, TBSSEL - a register bit is set.

00 means no clock selected

01 means synchronous clock (CLK)

10 means asynchronous clock ( ACLK)

11 means invalid clock.

So, in general, to set the Timer_B clock to ACLK. TBSSEL should be set to 10.

2. To set the clock frequency, prescaling is done. It will decrease the frequency. In general, prescaling can set as

00 represents 1

01 represents 2

10 represents 4

11 represents 8

So, to prescale the incoming clock by 2, ID should be select as 01.

3. There can be multiple stage prescaling. So, if there second stage prescaling, it can be selected as

000 means 0

001 means 1

010 means 2

011 means 3

100 means 4

101 means 5

110 means 6

111 means 7

So, to prescale the incoming clock by 7, IDEX should be selected as 111.